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Block comments are delimited by ‘/*’ and ‘*/’. End of line comments may be introduced by ‘#’.
Instructions consist of a leading opcode or macro name followed by whitespace and an optional comma-separated list of operands:
opcode [operand, …]
Instructions must be separated by a newline or semicolon.
There are two ways to write code: either write naked instructions, which the assembler is free to combine into VLIW bundles, or specify the VLIW bundles explicitly.
Bundles are specified using curly braces:
{ add r3,r4,r5 ; add r7,r8,r9 ; lw r10,r11 }
A bundle can span multiple lines. If you want to put multiple instructions on a line, whether in a bundle or not, you need to separate them with semicolons as in this example.
A bundle may contain one or more instructions, up to the limit
specified by the ISA (currently three). If fewer instructions are
specified than the hardware supports in a bundle, the assembler
inserts fnop
instructions automatically.
The assembler will prefer to preserve the ordering of instructions
within the bundle, putting the first instruction in a lower-numbered
pipeline than the next one, etc. This fact, combined with the
optional use of explicit fnop
or nop
instructions,
allows precise control over which pipeline executes each instruction.
If the instructions cannot be bundled in the listed order, the assembler will automatically try to find a valid pipeline assignment. If there is no way to bundle the instructions together, the assembler reports an error.
The assembler does not yet auto-bundle (automatically combine multiple
instructions into one bundle), but it reserves the right to do so in
the future. If you want to force an instruction to run by itself, put
it in a bundle explicitly with curly braces and use nop
instructions (not fnop
) to fill the remaining pipeline slots in
that bundle.
• TILE-Gx Opcodes: | Opcode Naming Conventions. | |
• TILE-Gx Registers: | Register Naming. | |
• TILE-Gx Modifiers: | Symbolic Operand Modifiers. |
Next: TILE-Gx Directives, Previous: TILE-Gx Options, Up: TILE-Gx-Dependent [Contents][Index]