9.29.2.3 Pseudo Instructions

li rt5,imm32

load 32-bit integer into register rt5. ‘sethi rt5,hi20(imm32)’ and then ‘ori rt5,reg,lo12(imm32)’.

la rt5,var

Load 32-bit address of var into register rt5. ‘sethi rt5,hi20(var)’ and then ‘ori reg,rt5,lo12(var)’

l.[bhw] rt5,var

Load value of var into register rt5. ‘sethi $ta,hi20(var)’ and then ‘l[bhw]i rt5,[$ta+lo12(var)]’

l.[bh]s rt5,var

Load value of var into register rt5. ‘sethi $ta,hi20(var)’ and then ‘l[bh]si rt5,[$ta+lo12(var)]’

l.[bhw]p rt5,var,inc

Load value of var into register rt5 and increment $ta by amount inc. ‘la $ta,var’ and then ‘l[bhw]i.bi rt5,[$ta],inc’

l.[bhw]pc rt5,inc

Continue loading value of var into register rt5 and increment $ta by amount inc. ‘l[bhw]i.bi rt5,[$ta],inc.’

l.[bh]sp rt5,var,inc

Load value of var into register rt5 and increment $ta by amount inc. ‘la $ta,var’ and then ‘l[bh]si.bi rt5,[$ta],inc’

l.[bh]spc rt5,inc

Continue loading value of var into register rt5 and increment $ta by amount inc. ‘l[bh]si.bi rt5,[$ta],inc.’

s.[bhw] rt5,var

Store register rt5 to var. ‘sethi $ta,hi20(var)’ and then ‘s[bhw]i rt5,[$ta+lo12(var)]’

s.[bhw]p rt5,var,inc

Store register rt5 to var and increment $ta by amount inc. ‘la $ta,var’ and then ‘s[bhw]i.bi rt5,[$ta],inc’

s.[bhw]pc rt5,inc

Continue storing register rt5 to var and increment $ta by amount inc. ‘s[bhw]i.bi rt5,[$ta],inc.’

not rt5,ra5

Alias of ‘nor rt5,ra5,ra5’.

neg rt5,ra5

Alias of ‘subri rt5,ra5,0’.

br rb5

Depending on how it is assembled, it is translated into ‘r5 rb5’ or ‘jr rb5’.

b label

Branch to label depending on how it is assembled, it is translated into ‘j8 label’, ‘j label’, or "‘la $ta,label’ ‘br $ta’".

bral rb5

Alias of jral br5 depending on how it is assembled, it is translated into ‘jral5 rb5’ or ‘jral rb5’.

bal fname

Alias of jal fname depending on how it is assembled, it is translated into ‘jal fname’ or "‘la $ta,fname’ ‘bral $ta’".

call fname

Call function fname same as ‘jal fname’.

move rt5,ra5

For 16-bit, this is ‘mov55 rt5,ra5’. For no 16-bit, this is ‘ori rt5,ra5,0’.

move rt5,var

This is the same as ‘l.w rt5,var’.

move rt5,imm32

This is the same as ‘li rt5,imm32’.

pushm ra5,rb5

Push contents of registers from ra5 to rb5 into stack.

push ra5

Push content of register ra5 into stack. (same ‘pushm ra5,ra5’).

push.d var

Push value of double-word variable var into stack.

push.w var

Push value of word variable var into stack.

push.h var

Push value of half-word variable var into stack.

push.b var

Push value of byte variable var into stack.

pusha var

Push 32-bit address of variable var into stack.

pushi imm32

Push 32-bit immediate value into stack.

popm ra5,rb5

Pop top of stack values into registers ra5 to rb5.

pop rt5

Pop top of stack value into register. (same as ‘popm rt5,rt5’.)

pop.d var,ra5

Pop value of double-word variable var from stack using register ra5 as 2nd scratch register. (1st is $ta)

pop.w var,ra5

Pop value of word variable var from stack using register ra5.

pop.h var,ra5

Pop value of half-word variable var from stack using register ra5.

pop.b var,ra5

Pop value of byte variable var from stack using register ra5.