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<h4 class="subsection">16.8.6 Disable insn alternatives using the <code>enabled</code> attribute</h4>
<p><a name="index-enabled-3364"></a>
There are three insn attributes that may be used to selectively disable
instruction alternatives:
<dl>
<dt><code>enabled</code><dd>Says whether an alternative is available on the current subtarget.
<br><dt><code>preferred_for_size</code><dd>Says whether an enabled alternative should be used in code that is
optimized for size.
<br><dt><code>preferred_for_speed</code><dd>Says whether an enabled alternative should be used in code that is
optimized for speed.
</dl>
<p>All these attributes should use <code>(const_int 1)</code> to allow an alternative
or <code>(const_int 0)</code> to disallow it. The attributes must be a static
property of the subtarget; they cannot for example depend on the
current operands, on the current optimization level, on the location
of the insn within the body of a loop, on whether register allocation
has finished, or on the current compiler pass.
<p>The <code>enabled</code> attribute is a correctness property. It tells GCC to act
as though the disabled alternatives were never defined in the first place.
This is useful when adding new instructions to an existing pattern in
cases where the new instructions are only available for certain cpu
architecture levels (typically mapped to the <code>-march=</code> command-line
option).
<p>In contrast, the <code>preferred_for_size</code> and <code>preferred_for_speed</code>
attributes are strong optimization hints rather than correctness properties.
<code>preferred_for_size</code> tells GCC which alternatives to consider when
adding or modifying an instruction that GCC wants to optimize for size.
<code>preferred_for_speed</code> does the same thing for speed. Note that things
like code motion can lead to cases where code optimized for size uses
alternatives that are not preferred for size, and similarly for speed.
<p>Although <code>define_insn</code>s can in principle specify the <code>enabled</code>
attribute directly, it is often clearer to have subsiduary attributes
for each architectural feature of interest. The <code>define_insn</code>s
can then use these subsiduary attributes to say which alternatives
require which features. The example below does this for <code>cpu_facility</code>.
<p>E.g. the following two patterns could easily be merged using the <code>enabled</code>
attribute:
<pre class="smallexample">
(define_insn "*movdi_old"
[(set (match_operand:DI 0 "register_operand" "=d")
(match_operand:DI 1 "register_operand" " d"))]
"!TARGET_NEW"
"lgr %0,%1")
(define_insn "*movdi_new"
[(set (match_operand:DI 0 "register_operand" "=d,f,d")
(match_operand:DI 1 "register_operand" " d,d,f"))]
"TARGET_NEW"
"@
lgr %0,%1
ldgr %0,%1
lgdr %0,%1")
</pre>
<p>to:
<pre class="smallexample">
(define_insn "*movdi_combined"
[(set (match_operand:DI 0 "register_operand" "=d,f,d")
(match_operand:DI 1 "register_operand" " d,d,f"))]
""
"@
lgr %0,%1
ldgr %0,%1
lgdr %0,%1"
[(set_attr "cpu_facility" "*,new,new")])
</pre>
<p>with the <code>enabled</code> attribute defined like this:
<pre class="smallexample">
(define_attr "cpu_facility" "standard,new" (const_string "standard"))
(define_attr "enabled" ""
(cond [(eq_attr "cpu_facility" "standard") (const_int 1)
(and (eq_attr "cpu_facility" "new")
(ne (symbol_ref "TARGET_NEW") (const_int 0)))
(const_int 1)]
(const_int 0)))
</pre>
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