doc/html/hmatrix_8h_source.html

#ifndef _SAME54_HMATRIX_INSTANCE_

#define _SAME54_HMATRIX_INSTANCE_


/* ========== Register definition for HMATRIX peripheral ========== */

#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))

#define REG_HMATRIX_PRAS0          (0x4100C080)

#define REG_HMATRIX_PRBS0          (0x4100C084)

#define REG_HMATRIX_PRAS1          (0x4100C088)

#define REG_HMATRIX_PRBS1          (0x4100C08C)

#define REG_HMATRIX_PRAS2          (0x4100C090)

#define REG_HMATRIX_PRBS2          (0x4100C094)

#define REG_HMATRIX_PRAS3          (0x4100C098)

#define REG_HMATRIX_PRBS3          (0x4100C09C)

#define REG_HMATRIX_PRAS4          (0x4100C0A0)

#define REG_HMATRIX_PRBS4          (0x4100C0A4)

#define REG_HMATRIX_PRAS5          (0x4100C0A8)

#define REG_HMATRIX_PRBS5          (0x4100C0AC)

#define REG_HMATRIX_PRAS6          (0x4100C0B0)

#define REG_HMATRIX_PRBS6          (0x4100C0B4)

#define REG_HMATRIX_PRAS7          (0x4100C0B8)

#define REG_HMATRIX_PRBS7          (0x4100C0BC)

#define REG_HMATRIX_PRAS8          (0x4100C0C0)

#define REG_HMATRIX_PRBS8          (0x4100C0C4)

#define REG_HMATRIX_PRAS9          (0x4100C0C8)

#define REG_HMATRIX_PRBS9          (0x4100C0CC)

#define REG_HMATRIX_PRAS10         (0x4100C0D0)

#define REG_HMATRIX_PRBS10         (0x4100C0D4)

#define REG_HMATRIX_PRAS11         (0x4100C0D8)

#define REG_HMATRIX_PRBS11         (0x4100C0DC)

#define REG_HMATRIX_PRAS12         (0x4100C0E0)

#define REG_HMATRIX_PRBS12         (0x4100C0E4)

#define REG_HMATRIX_PRAS13         (0x4100C0E8)

#define REG_HMATRIX_PRBS13         (0x4100C0EC)

#define REG_HMATRIX_PRAS14         (0x4100C0F0)

#define REG_HMATRIX_PRBS14         (0x4100C0F4)

#define REG_HMATRIX_PRAS15         (0x4100C0F8)

#define REG_HMATRIX_PRBS15         (0x4100C0FC)

#else

#define REG_HMATRIX_PRAS0          (*(RwReg  *)0x4100C080UL)

#define REG_HMATRIX_PRBS0          (*(RwReg  *)0x4100C084UL)

#define REG_HMATRIX_PRAS1          (*(RwReg  *)0x4100C088UL)

#define REG_HMATRIX_PRBS1          (*(RwReg  *)0x4100C08CUL)

#define REG_HMATRIX_PRAS2          (*(RwReg  *)0x4100C090UL)

#define REG_HMATRIX_PRBS2          (*(RwReg  *)0x4100C094UL)

#define REG_HMATRIX_PRAS3          (*(RwReg  *)0x4100C098UL)

#define REG_HMATRIX_PRBS3          (*(RwReg  *)0x4100C09CUL)

#define REG_HMATRIX_PRAS4          (*(RwReg  *)0x4100C0A0UL)

#define REG_HMATRIX_PRBS4          (*(RwReg  *)0x4100C0A4UL)

#define REG_HMATRIX_PRAS5          (*(RwReg  *)0x4100C0A8UL)

#define REG_HMATRIX_PRBS5          (*(RwReg  *)0x4100C0ACUL)

#define REG_HMATRIX_PRAS6          (*(RwReg  *)0x4100C0B0UL)

#define REG_HMATRIX_PRBS6          (*(RwReg  *)0x4100C0B4UL)

#define REG_HMATRIX_PRAS7          (*(RwReg  *)0x4100C0B8UL)

#define REG_HMATRIX_PRBS7          (*(RwReg  *)0x4100C0BCUL)

#define REG_HMATRIX_PRAS8          (*(RwReg  *)0x4100C0C0UL)

#define REG_HMATRIX_PRBS8          (*(RwReg  *)0x4100C0C4UL)

#define REG_HMATRIX_PRAS9          (*(RwReg  *)0x4100C0C8UL)

#define REG_HMATRIX_PRBS9          (*(RwReg  *)0x4100C0CCUL)

#define REG_HMATRIX_PRAS10         (*(RwReg  *)0x4100C0D0UL)

#define REG_HMATRIX_PRBS10         (*(RwReg  *)0x4100C0D4UL)

#define REG_HMATRIX_PRAS11         (*(RwReg  *)0x4100C0D8UL)

#define REG_HMATRIX_PRBS11         (*(RwReg  *)0x4100C0DCUL)

#define REG_HMATRIX_PRAS12         (*(RwReg  *)0x4100C0E0UL)

#define REG_HMATRIX_PRBS12         (*(RwReg  *)0x4100C0E4UL)

#define REG_HMATRIX_PRAS13         (*(RwReg  *)0x4100C0E8UL)

#define REG_HMATRIX_PRBS13         (*(RwReg  *)0x4100C0ECUL)

#define REG_HMATRIX_PRAS14         (*(RwReg  *)0x4100C0F0UL)

#define REG_HMATRIX_PRBS14         (*(RwReg  *)0x4100C0F4UL)

#define REG_HMATRIX_PRAS15         (*(RwReg  *)0x4100C0F8UL)

#define REG_HMATRIX_PRBS15         (*(RwReg  *)0x4100C0FCUL)

#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */


/* ========== Instance parameters for HMATRIX peripheral ========== */

#define HMATRIX_CLK_AHB_ID          5        // Index of AHB Clock in MCLK.AHBMASK register (MASK may be tied to 1 depending on chip integration)

#define HMATRIX_DEFINED

/* ========== Instance parameters for HMATRIX ========== */

#define HMATRIX_SLAVE_FLASH         0

#define HMATRIX_SLAVE_FLASH_ALT     1

#define HMATRIX_SLAVE_SEEPROM       2

#define HMATRIX_SLAVE_RAMCM4S       3

#define HMATRIX_SLAVE_RAMPPPDSU     4

#define HMATRIX_SLAVE_RAMDMAWR      5

#define HMATRIX_SLAVE_RAMDMACICM    6

#define HMATRIX_SLAVE_HPB0          7

#define HMATRIX_SLAVE_HPB1          8

#define HMATRIX_SLAVE_HPB2          9

#define HMATRIX_SLAVE_HPB3          10

#define HMATRIX_SLAVE_SDHC0         12

#define HMATRIX_SLAVE_SDHC1         13

#define HMATRIX_SLAVE_QSPI          14

#define HMATRIX_SLAVE_BKUPRAM       15

#define HMATRIX_SLAVE_NUM           16


#define HMATRIX_MASTER_CM4_S        0

#define HMATRIX_MASTER_CMCC         1

#define HMATRIX_MASTER_PICOP_MEM    2

#define HMATRIX_MASTER_PICOP_IO     3

#define HMATRIX_MASTER_DMAC_DTWR    4

#define HMATRIX_MASTER_DMAC_DTRD    5

#define HMATRIX_MASTER_ICM          6

#define HMATRIX_MASTER_DSU          7

#define HMATRIX_MASTER_NUM          8


#endif /* _SAME54_HMATRIX_INSTANCE_ */