SAME54P20A Test Project
memory.c
1 #include "memory.h"
2 #include "conf_core.h"
3 
4 void mem_nvm_init(void)
5 {
6  CRITICAL_SECTION_ENTER();
7  NVMCTRL->CTRLA.bit.RWS = CONF_CORE_MCLK_NVM_WAIT_STATE;
8  CRITICAL_SECTION_LEAVE();
9 }
10 
11 void mem_cache_init(void)
12 {
13 #if CORE_CONF_CMCC_ENABLE == 1
14 
15 #endif
16 }
17 
18 void mem_dma_init(void)
19 {
20 #if CORE_CONF_DMA_ENABLE
21  CRITICAL_SECTION_ENTER();
22  MCLK->AHBMASK.reg |= MCLK_AHBMASK_DMAC;
23  CRITICAL_SECTION_LEAVE();
24 #endif
25 }
26 
CONF_CORE_MCLK_NVM_WAIT_STATE
#define CONF_CORE_MCLK_NVM_WAIT_STATE
Definition: conf_core.h:23
NVMCTRL
#define NVMCTRL
(NVMCTRL) APB Base Address
Definition: same54n19a.h:918
MCLK
#define MCLK
(MCLK) APB Base Address
Definition: same54n19a.h:914
conf_core.h