3.17.21 M680x0 Options

These are the ‘-m’ options defined for M680x0 and ColdFire processors. The default settings depend on which architecture was selected when the compiler was configured; the defaults for the most common choices are given below.

-march=arch

Generate code for a specific M680x0 or ColdFire instruction set architecture. Permissible values of arch for M680x0 architectures are: ‘68000’, ‘68010’, ‘68020’, ‘68030’, ‘68040’, ‘68060’ and ‘cpu32’. ColdFire architectures are selected according to Freescale's ISA classification and the permissible values are: ‘isaa’, ‘isaaplus’, ‘isab’ and ‘isac’.

GCC defines a macro __mcfarch__ whenever it is generating code for a ColdFire target. The arch in this macro is one of the -march arguments given above.

When used together, -march and -mtune select code that runs on a family of similar processors but that is optimized for a particular microarchitecture.

-mcpu=cpu

Generate code for a specific M680x0 or ColdFire processor. The M680x0 cpus are: ‘68000’, ‘68010’, ‘68020’, ‘68030’, ‘68040’, ‘68060’, ‘68302’, ‘68332’ and ‘cpu32’. The ColdFire cpus are given by the table below, which also classifies the CPUs into families:

Family	‘-mcpu’ arguments
‘51’	‘51’ ‘51ac’ ‘51ag’ ‘51cn’ ‘51em’ ‘51je’ ‘51jf’ ‘51jg’ ‘51jm’ ‘51mm’ ‘51qe’ ‘51qm’
‘5206’	‘5202’ ‘5204’ ‘5206’
‘5206e’	‘5206e’
‘5208’	‘5207’ ‘5208’
‘5211a’	‘5210a’ ‘5211a’
‘5213’	‘5211’ ‘5212’ ‘5213’
‘5216’	‘5214’ ‘5216’
‘52235’	‘52230’ ‘52231’ ‘52232’ ‘52233’ ‘52234’ ‘52235’
‘5225’	‘5224’ ‘5225’
‘52259’	‘52252’ ‘52254’ ‘52255’ ‘52256’ ‘52258’ ‘52259’
‘5235’	‘5232’ ‘5233’ ‘5234’ ‘5235’ ‘523x’
‘5249’	‘5249’
‘5250’	‘5250’
‘5271’	‘5270’ ‘5271’
‘5272’	‘5272’
‘5275’	‘5274’ ‘5275’
‘5282’	‘5280’ ‘5281’ ‘5282’ ‘528x’
‘53017’	‘53011’ ‘53012’ ‘53013’ ‘53014’ ‘53015’ ‘53016’ ‘53017’
‘5307’	‘5307’
‘5329’	‘5327’ ‘5328’ ‘5329’ ‘532x’
‘5373’	‘5372’ ‘5373’ ‘537x’
‘5407’	‘5407’
‘5475’	‘5470’ ‘5471’ ‘5472’ ‘5473’ ‘5474’ ‘5475’ ‘547x’ ‘5480’ ‘5481’ ‘5482’ ‘5483’ ‘5484’ ‘5485’

-mcpu=cpu overrides -march=arch if arch is compatible with cpu. Other combinations of -mcpu and -march are rejected.

GCC defines the macro __mcf_cpu_cpu when ColdFire target cpu is selected. It also defines __mcf_family_family, where the value of family is given by the table above.

-mtune=tune

Tune the code for a particular microarchitecture within the constraints set by -march and -mcpu. The M680x0 microarchitectures are: ‘68000’, ‘68010’, ‘68020’, ‘68030’, ‘68040’, ‘68060’ and ‘cpu32’. The ColdFire microarchitectures are: ‘cfv1’, ‘cfv2’, ‘cfv3’, ‘cfv4’ and ‘cfv4e’.

You can also use -mtune=68020-40 for code that needs to run relatively well on 68020, 68030 and 68040 targets. -mtune=68020-60 is similar but includes 68060 targets as well. These two options select the same tuning decisions as -m68020-40 and -m68020-60 respectively.

GCC defines the macros __mcarch and __mcarch__ when tuning for 680x0 architecture arch. It also defines mcarch unless either -ansi or a non-GNU -std option is used. If GCC is tuning for a range of architectures, as selected by -mtune=68020-40 or -mtune=68020-60, it defines the macros for every architecture in the range.

GCC also defines the macro __muarch__ when tuning for ColdFire microarchitecture uarch, where uarch is one of the arguments given above.

-m68000

-mc68000

Generate output for a 68000. This is the default when the compiler is configured for 68000-based systems. It is equivalent to -march=68000.

Use this option for microcontrollers with a 68000 or EC000 core, including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.

-m68010

Generate output for a 68010. This is the default when the compiler is configured for 68010-based systems. It is equivalent to -march=68010.

-m68020

-mc68020

Generate output for a 68020. This is the default when the compiler is configured for 68020-based systems. It is equivalent to -march=68020.

-m68030

Generate output for a 68030. This is the default when the compiler is configured for 68030-based systems. It is equivalent to -march=68030.

-m68040

Generate output for a 68040. This is the default when the compiler is configured for 68040-based systems. It is equivalent to -march=68040.

This option inhibits the use of 68881/68882 instructions that have to be emulated by software on the 68040. Use this option if your 68040 does not have code to emulate those instructions.

-m68060

Generate output for a 68060. This is the default when the compiler is configured for 68060-based systems. It is equivalent to -march=68060.

This option inhibits the use of 68020 and 68881/68882 instructions that have to be emulated by software on the 68060. Use this option if your 68060 does not have code to emulate those instructions.

-mcpu32

Generate output for a CPU32. This is the default when the compiler is configured for CPU32-based systems. It is equivalent to -march=cpu32.

Use this option for microcontrollers with a CPU32 or CPU32+ core, including the 68330, 68331, 68332, 68333, 68334, 68336, 68340, 68341, 68349 and 68360.

-m5200

Generate output for a 520X ColdFire CPU. This is the default when the compiler is configured for 520X-based systems. It is equivalent to -mcpu=5206, and is now deprecated in favor of that option.

Use this option for microcontroller with a 5200 core, including the MCF5202, MCF5203, MCF5204 and MCF5206.

-m5206e

Generate output for a 5206e ColdFire CPU. The option is now deprecated in favor of the equivalent -mcpu=5206e.

-m528x

Generate output for a member of the ColdFire 528X family. The option is now deprecated in favor of the equivalent -mcpu=528x.

-m5307

Generate output for a ColdFire 5307 CPU. The option is now deprecated in favor of the equivalent -mcpu=5307.

-m5407

Generate output for a ColdFire 5407 CPU. The option is now deprecated in favor of the equivalent -mcpu=5407.

-mcfv4e

Generate output for a ColdFire V4e family CPU (e.g. 547x/548x). This includes use of hardware floating-point instructions. The option is equivalent to -mcpu=547x, and is now deprecated in favor of that option.

-m68020-40

Generate output for a 68040, without using any of the new instructions. This results in code that can run relatively efficiently on either a 68020/68881 or a 68030 or a 68040. The generated code does use the 68881 instructions that are emulated on the 68040.

The option is equivalent to -march=68020 -mtune=68020-40.

-m68020-60

Generate output for a 68060, without using any of the new instructions. This results in code that can run relatively efficiently on either a 68020/68881 or a 68030 or a 68040. The generated code does use the 68881 instructions that are emulated on the 68060.

The option is equivalent to -march=68020 -mtune=68020-60.

-mhard-float

-m68881

Generate floating-point instructions. This is the default for 68020 and above, and for ColdFire devices that have an FPU. It defines the macro __HAVE_68881__ on M680x0 targets and __mcffpu__ on ColdFire targets.

-msoft-float

Do not generate floating-point instructions; use library calls instead. This is the default for 68000, 68010, and 68832 targets. It is also the default for ColdFire devices that have no FPU.

-mdiv

-mno-div

Generate (do not generate) ColdFire hardware divide and remainder instructions. If -march is used without -mcpu, the default is “on” for ColdFire architectures and “off” for M680x0 architectures. Otherwise, the default is taken from the target CPU (either the default CPU, or the one specified by -mcpu). For example, the default is “off” for -mcpu=5206 and “on” for -mcpu=5206e.

GCC defines the macro __mcfhwdiv__ when this option is enabled.

-mshort

Consider type int to be 16 bits wide, like short int. Additionally, parameters passed on the stack are also aligned to a 16-bit boundary even on targets whose API mandates promotion to 32-bit.

-mno-short

Do not consider type int to be 16 bits wide. This is the default.

-mnobitfield

-mno-bitfield

Do not use the bit-field instructions. The -m68000, -mcpu32 and -m5200 options imply -mnobitfield.

-mbitfield

Do use the bit-field instructions. The -m68020 option implies -mbitfield. This is the default if you use a configuration designed for a 68020.

-mrtd

Use a different function-calling convention, in which functions that take a fixed number of arguments return with the rtd instruction, which pops their arguments while returning. This saves one instruction in the caller since there is no need to pop the arguments there.

This calling convention is incompatible with the one normally used on Unix, so you cannot use it if you need to call libraries compiled with the Unix compiler.

Also, you must provide function prototypes for all functions that take variable numbers of arguments (including printf); otherwise incorrect code is generated for calls to those functions.

In addition, seriously incorrect code results if you call a function with too many arguments. (Normally, extra arguments are harmlessly ignored.)

The rtd instruction is supported by the 68010, 68020, 68030, 68040, 68060 and CPU32 processors, but not by the 68000 or 5200.

-mno-rtd

Do not use the calling conventions selected by -mrtd. This is the default.

-malign-int

-mno-align-int

Control whether GCC aligns int, long, long long, float, double, and long double variables on a 32-bit boundary (-malign-int) or a 16-bit boundary (-mno-align-int). Aligning variables on 32-bit boundaries produces code that runs somewhat faster on processors with 32-bit busses at the expense of more memory.

Warning: if you use the -malign-int switch, GCC aligns structures containing the above types differently than most published application binary interface specifications for the m68k.

-mpcrel

Use the pc-relative addressing mode of the 68000 directly, instead of using a global offset table. At present, this option implies -fpic, allowing at most a 16-bit offset for pc-relative addressing. -fPIC is not presently supported with -mpcrel, though this could be supported for 68020 and higher processors.

-mno-strict-align

-mstrict-align

Do not (do) assume that unaligned memory references are handled by the system.

-msep-data

Generate code that allows the data segment to be located in a different area of memory from the text segment. This allows for execute-in-place in an environment without virtual memory management. This option implies -fPIC.

-mno-sep-data

Generate code that assumes that the data segment follows the text segment. This is the default.

-mid-shared-library

Generate code that supports shared libraries via the library ID method. This allows for execute-in-place and shared libraries in an environment without virtual memory management. This option implies -fPIC.

-mno-id-shared-library

Generate code that doesn't assume ID-based shared libraries are being used. This is the default.

-mshared-library-id=n

Specifies the identification number of the ID-based shared library being compiled. Specifying a value of 0 generates more compact code; specifying other values forces the allocation of that number to the current library, but is no more space- or time-efficient than omitting this option.

-mxgot

-mno-xgot

When generating position-independent code for ColdFire, generate code that works if the GOT has more than 8192 entries. This code is larger and slower than code generated without this option. On M680x0 processors, this option is not needed; -fPIC suffices.

GCC normally uses a single instruction to load values from the GOT. While this is relatively efficient, it only works if the GOT is smaller than about 64k. Anything larger causes the linker to report an error such as:

          relocation truncated to fit: R_68K_GOT16O foobar

If this happens, you should recompile your code with -mxgot. It should then work with very large GOTs. However, code generated with -mxgot is less efficient, since it takes 4 instructions to fetch the value of a global symbol.

Note that some linkers, including newer versions of the GNU linker, can create multiple GOTs and sort GOT entries. If you have such a linker, you should only need to use -mxgot when compiling a single object file that accesses more than 8192 GOT entries. Very few do.

These options have no effect unless GCC is generating position-independent code.