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<h4 class="subsection">9.40.3 Floating Point</h4>
<p><a name="index-floating-point_002c-SH-_0028_0040sc_007bieee_007d_0029-1950"></a><a name="index-SH-floating-point-_0028_0040sc_007bieee_007d_0029-1951"></a>SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other
SH groups can use <code>.float</code> directive to generate <span class="sc">ieee</span>
floating-point numbers.
<p>SH2E and SH3E support single-precision floating point calculations as
well as entirely PCAPI compatible emulation of double-precision
floating point calculations. SH2E and SH3E instructions are a subset of
the floating point calculations conforming to the IEEE754 standard.
<p>In addition to single-precision and double-precision floating-point
operation capability, the on-chip FPU of SH4 has a 128-bit graphic
engine that enables 32-bit floating-point data to be processed 128
bits at a time. It also supports 4 * 4 array operations and inner
product operations. Also, a superscalar architecture is employed that
enables simultaneous execution of two instructions (including FPU
instructions), providing performance of up to twice that of
conventional architectures at the same frequency.
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