From fa818a37aada50489fbb6cd9c332fc4d8063fa4c Mon Sep 17 00:00:00 2001 From: penguin Date: Thu, 24 Dec 2020 21:51:19 -0600 Subject: [PATCH] updating clocks for e54 --- .../same54p20a_test/ESF/modules/core/clocks.h | 30 +++++++++++++++++- test/same54p20a_test/cfg/conf_clocks.h | Bin 1798 -> 1797 bytes 2 files changed, 29 insertions(+), 1 deletion(-) diff --git a/test/same54p20a_test/ESF/modules/core/clocks.h b/test/same54p20a_test/ESF/modules/core/clocks.h index 5831a213..4ef6f200 100644 --- a/test/same54p20a_test/ESF/modules/core/clocks.h +++ b/test/same54p20a_test/ESF/modules/core/clocks.h @@ -2,7 +2,7 @@ #define _CLOCKS_H_ #include "sam.h" - +#include "conf_clocks.h" // XOSC32K Definitions #define CORE_CONF_CLK_XOSC32KCTRL_CGM_STD_MODE (0x1) #define CORE_CONF_CLK_XOSC32KCTRL_CGM_HS_MODE (0x2) @@ -52,6 +52,34 @@ static inline void clock_osc32k_init(void) static inline void clock_osc_init(void) { +#if CORE_CONF_CLK_XOSC0_ENABLE == 1 + OSCCTRL->XOSCCTRL[0].bit.XTALEN = CORE_CONF_CLK_XOSC0_XTALEN; + OSCCTRL->XOSCCTRL[0].bit.RUNSTDBY = CORE_CONF_CLK_XOSC0_RUNSTDBY; + OSCCTRL->XOSCCTRL[0].bit.ONDEMAND = CORE_CONF_CLK_XOSC0_ONDEMAND; + OSCCTRL->XOSCCTRL[0].bit.LOWBUFGAIN = CORE_CONF_CLK_XOSC0_LOWBUFGAIN; + OSCCTRL->XOSCCTRL[0].bit.IPTAT = CORE_CONF_CLK_XOSC0_IPTAT; + OSCCTRL->XOSCCTRL[0].bit.IMULT = CORE_CONF_CLK_XOSC0_IMULT; + OSCCTRL->XOSCCTRL[0].bit.ENALC = CORE_CONF_CLK_XOSC0_ENALC; + OSCCTRL->XOSCCTRL[0].bit.CFDEN = CORE_CONF_CLK_XOSC0_CFDEN; + OSCCTRL->XOSCCTRL[0].bit.CFDPRESC = CORE_CONF_CLK_XOSC0_CFDPRESC; + OSCCTRL->XOSCCTRL[0].bit.SWBEN = CORE_CONF_CLK_XOSC0_SWBEN; + OSCCTRL->XOSCCTRL[0].bit.STARTUP = CORE_CONF_CLK_XOSC0_STARTUP_TIME; +#endif + +#if CORE_CONF_CLK_XOSC1_ENABLE == 1 + OSCCTRL->XOSCCTRL[1].bit.XTALEN = CORE_CONF_CLK_XOSC1_XTALEN; + OSCCTRL->XOSCCTRL[1].bit.RUNSTDBY = CORE_CONF_CLK_XOSC1_RUNSTDBY; + OSCCTRL->XOSCCTRL[1].bit.ONDEMAND = CORE_CONF_CLK_XOSC1_ONDEMAND; + OSCCTRL->XOSCCTRL[1].bit.LOWBUFGAIN = CORE_CONF_CLK_XOSC1_LOWBUFGAIN; + OSCCTRL->XOSCCTRL[1].bit.IPTAT = CORE_CONF_CLK_XOSC1_IPTAT; + OSCCTRL->XOSCCTRL[1].bit.IMULT = CORE_CONF_CLK_XOSC1_IMULT; + OSCCTRL->XOSCCTRL[1].bit.ENALC = CORE_CONF_CLK_XOSC1_ENALC; + OSCCTRL->XOSCCTRL[1].bit.CFDEN = CORE_CONF_CLK_XOSC1_CFDEN; + OSCCTRL->XOSCCTRL[1].bit.CFDPRESC = CORE_CONF_CLK_XOSC1_CFDPRESC; + OSCCTRL->XOSCCTRL[1].bit.SWBEN = CORE_CONF_CLK_XOSC1_SWBEN; + OSCCTRL->XOSCCTRL[1].bit.STARTUP = CORE_CONF_CLK_XOSC1_STARTUP_TIME; +#endif + } static inline void clock_mclk_init(void) diff --git a/test/same54p20a_test/cfg/conf_clocks.h b/test/same54p20a_test/cfg/conf_clocks.h index 12b3de17717841679f56395f86ba2114011d4fac..66bbe8901bd4b5096263994ff27e5503a878c3b1 100644 GIT binary patch delta 10 RcmZqUYvr3@xY6he8vqll1Ev4~ delta 12 TcmZqWYvY?>$jGqK@Cq9M7k&e#