From c4bdb1d55d7676c628d19052394d76015452a59d Mon Sep 17 00:00:00 2001 From: Penguin Date: Sun, 19 Dec 2021 18:15:53 -0600 Subject: [PATCH] updating the way target manifests look --- arch/arm/SAMD21/SAMD21A/manifest/samd21a.toml | 17 +++-- .../ESF/modules/core/.#clocks.h | 1 - .../same54p20a_test/ESF/modules/core/clocks.h | 5 -- .../ESF/modules/sercom/sercom.h | 5 ++ .../ESF/modules/usart_sync/usart_sync.c | 22 +++++++ .../ESF/modules/usart_sync/usart_sync.h | 2 + test/same54p20a_test/cfg/conf_sercom.h | 63 +++++++++++++++++++ 7 files changed, 104 insertions(+), 11 deletions(-) delete mode 120000 test/same54p20a_test/ESF/modules/core/.#clocks.h create mode 100644 test/same54p20a_test/ESF/modules/sercom/sercom.h create mode 100644 test/same54p20a_test/cfg/conf_sercom.h diff --git a/arch/arm/SAMD21/SAMD21A/manifest/samd21a.toml b/arch/arm/SAMD21/SAMD21A/manifest/samd21a.toml index 88a84286..feadf0fb 100644 --- a/arch/arm/SAMD21/SAMD21A/manifest/samd21a.toml +++ b/arch/arm/SAMD21/SAMD21A/manifest/samd21a.toml @@ -1,11 +1,18 @@ [esf.links] common = "arch/arm/common" -mcu = "arch/arm/SAMD21/SAMD21A/mcu/" -ld = "arch/arm/SAMD21/SAMD21A/ld/" -cfg = "arch/arm/SAMD21/SAMD21A/manifest/" +mcu = "arch/arm/SAMD21/SAMD21A/mcu" +ld = "arch/arm/SAMD21/SAMD21A/ld" +cfg = "arch/arm/SAMD21/SAMD21A/manifest" [esf.includes] IGLOO_INCLUDES = ["sam.h"] # These are defaults. Once a project is generated, the .cfg can be freely edited without fear of anything being overwritten. However, I do not recommend editing any of the _cfg variables. -[esf.openocd] -scripts = "arch/arm/SAMD21/SAMD21A/scripts/" +[esf.scripts] +scripts = ["arch/arm/SAMD21/SAMD21A/scripts/${TARGET}.cfg", "scripts"] + +# lineage for this family of mcus +# this is used to evaluate makefile requirements for mcus +# this will be evaluated to "arch.arm.samd21a. +[esf.make] +series = "arch.arm.samd21a.${TARGET}" + diff --git a/test/same54p20a_test/ESF/modules/core/.#clocks.h b/test/same54p20a_test/ESF/modules/core/.#clocks.h deleted file mode 120000 index 5f065dba..00000000 --- a/test/same54p20a_test/ESF/modules/core/.#clocks.h +++ /dev/null @@ -1 +0,0 @@ -penguin@penguin-arch-home.19167:1609094009 \ No newline at end of file diff --git a/test/same54p20a_test/ESF/modules/core/clocks.h b/test/same54p20a_test/ESF/modules/core/clocks.h index f99a82ba..95c6df1e 100644 --- a/test/same54p20a_test/ESF/modules/core/clocks.h +++ b/test/same54p20a_test/ESF/modules/core/clocks.h @@ -3,11 +3,6 @@ #include "core.h" -// XOSC32K Definitions -#define CONF_CORE_CLK_XOSC32KCTRL_CGM_LP_MODE (0x0) -#define CONF_CORE_CLK_XOSC32KCTRL_CGM_STD_MODE (0x1) -#define CONF_CORE_CLK_XOSC32KCTRL_CGM_HS_MODE (0x2) - #define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_62592us (0x0) #define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_125092us (0x1) #define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_500092us (0x2) diff --git a/test/same54p20a_test/ESF/modules/sercom/sercom.h b/test/same54p20a_test/ESF/modules/sercom/sercom.h new file mode 100644 index 00000000..215a15fc --- /dev/null +++ b/test/same54p20a_test/ESF/modules/sercom/sercom.h @@ -0,0 +1,5 @@ +#ifndef __SERCOM_H__ +#define __SERCOM_H__ + + +#endif diff --git a/test/same54p20a_test/ESF/modules/usart_sync/usart_sync.c b/test/same54p20a_test/ESF/modules/usart_sync/usart_sync.c index 24175643..07daa5a5 100644 --- a/test/same54p20a_test/ESF/modules/usart_sync/usart_sync.c +++ b/test/same54p20a_test/ESF/modules/usart_sync/usart_sync.c @@ -1,6 +1,28 @@ #include "usart_sync.h" +#include "core.h" + +#define USART_TX PIN_PA04 +#define USART_RX PIN_PA05 +#define USART_SERCOM SERCOM0 void usart_init(void) { + // CLOCKS INIT PCHCTRL + if(!SERCOM0->USART.SYNCBUSY.bit.SWRST) + { + uint32_t mode = SERCOM0->USART.CTRLA.bit.MODE; + if(SERCOM0->USART.CTRLA.bit.ENABLE) + { + SERCOM0->USART.CTRLA.bit.ENABLE = 0; + while(SERCOM0->USART.SYNCBUSY.bit.ENABLE); + } + + SERCOM0->USART.CTRLA.reg = mode | SERCOM_USART_CTRLA_SWRST; + while(SERCOM0->USART.SYNCBUSY.bit.SWRST || SERCOM0->USART.SYNCBUSY.bit.ENABLE); + } + while(SERCOM0->USART.SYNCBUSY.bit.SWRST); + CRITICAL_SECTION_ENTER(); + SERCOM0->USART.CTRLA.bit.MODE = + CRITICAL_SECTION_LEAVE(); } diff --git a/test/same54p20a_test/ESF/modules/usart_sync/usart_sync.h b/test/same54p20a_test/ESF/modules/usart_sync/usart_sync.h index 26c7148e..d860b7db 100644 --- a/test/same54p20a_test/ESF/modules/usart_sync/usart_sync.h +++ b/test/same54p20a_test/ESF/modules/usart_sync/usart_sync.h @@ -1,6 +1,8 @@ #ifndef _USART_H_ #define _USART_H_ +#include "igloo.h" + void usart_init(void); #endif diff --git a/test/same54p20a_test/cfg/conf_sercom.h b/test/same54p20a_test/cfg/conf_sercom.h new file mode 100644 index 00000000..c9364036 --- /dev/null +++ b/test/same54p20a_test/cfg/conf_sercom.h @@ -0,0 +1,63 @@ +#ifndef __CONF_SERCOM_H__ +#define __CONF_SERCOM_H__ + +#define CONF_SERCOM_0_ENABLE (0) +#define CONF_SERCOM_1_ENABLE (0) +#define CONF_SERCOM_2_ENABLE (0) +#define CONF_SERCOM_3_ENABLE (0) +#define CONF_SERCOM_4_ENABLE (0) +#define CONF_SERCOM_5_ENABLE (0) +#define CONF_SERCOM_6_ENABLE (0) +#define CONF_SERCOM_7_ENABLE (0) + +#define CONF_SERCOM_0_USART_ENABLE 1 +#define CONF_SERCOM_0_USART_RXEN 1 +#define CONF_SERCOM_0_USART_TXEN 1 +#define CONF_SERCOM_0_USART_PARITY 0 +#define CONF_SERCOM_0_USART_CHSIZE 0 +#define CONF_SERCOM_0_USART_SBMODE 0 +#define CONF_SERCOM_0_USART_BAUD 115200 +#define CONF_SERCOM_0_USART_ADVANCED_CONFIG 0 +#define CONF_SERCOM_0_USART_RUNSTANDBY 0 +#define CONF_SERCOM_0_USART_IBON 0 +#define CONF_SERCOM_0_USART_SFDE 0 +#define CONF_SERCOM_0_USART_CLODEN 0 +#define CONF_SERCOM_0_USART_MODE 0x1 +#define CONF_SERCOM_0_USART_SAMPR 0x0 +#define CONF_SERCOM_0_USART_SAMPA 0x0 +#define CONF_SERCOM_0_USART_DORD 1 +#define CONF_SERCOM_0_USART_CPOL 0 +#define CONF_SERCOM_0_USART_ENC 0 +#define CONF_SERCOM_0_USART_LIN_SLAVE_ENABLE 0 +#define CONF_SERCOM_0_USART_DEBUG_STOP_MODE 0 +#define CONF_SERCOM_0_USART_INACK 0x0 +#define CONF_SERCOM_0_USART_DSNACK 0x0 +#define CONF_SERCOM_0_USART_MAXITER 0x7 +#define CONF_SERCOM_0_USART_GTIME 0x2 +#define CONF_SERCOM_0_USART_RXINV 0x0 +#define CONF_SERCOM_0_USART_TXINV 0x0 +#define CONF_SERCOM_0_USART_CMODE 1 +#define CONF_SERCOM_0_USART_RXPO 1 // RX is on PIN_PA05 +#define CONF_SERCOM_0_USART_TXPO 0 + +#if CONF_SERCOM_0_USART_LIN_SLAVE_ENABLE == 1 +#if CONF_SERCOM_0_USART_PARITY == 0 +#define CONF_SERCOM_0_USART_PMODE 0 +#define CONF_SERCOM_0_USART_FORM 4 +#else +#define CONF_SERCOM_0_USART_PMODE CONF_SERCOM_0_USART_PARITY - 1 +#define CONF_SERCOM_0_USART_FORM 5 +#endif +#else +#if CONF_SERCOM_0_USART_PARITY == 0 +#define CONF_SERCOM_0_USART_PMODE 0 +#define CONF_SERCOM_0_USART_FORM 0 +#else +#define CONF_SERCOM_0_USART_PMODE CONF_SERCOM_0_USART_PARITY - 1 +#define CONF_SERCOM_0_USART_FORM 1 +#endif +#endif + +#if CONF_SERCOM_0_USART_SAMPR == 0 +#define CONF_SERCOM_0_USART_BAUD_RATE \ +(65536 - ((65536 * 16.0f * CONF_SERCOM_0_USART_BAUD) / CONF_GCLK_SERCOM0_CORE_FREQUENCY))