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30 #ifndef _SAME54_PDEC_COMPONENT_
31 #define _SAME54_PDEC_COMPONENT_
40 #define REV_PDEC 0x100
43 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
80 #define PDEC_CTRLA_OFFSET 0x00
81 #define PDEC_CTRLA_RESETVALUE _U_(0x00000000)
83 #define PDEC_CTRLA_SWRST_Pos 0
84 #define PDEC_CTRLA_SWRST (_U_(0x1) << PDEC_CTRLA_SWRST_Pos)
85 #define PDEC_CTRLA_ENABLE_Pos 1
86 #define PDEC_CTRLA_ENABLE (_U_(0x1) << PDEC_CTRLA_ENABLE_Pos)
87 #define PDEC_CTRLA_MODE_Pos 2
88 #define PDEC_CTRLA_MODE_Msk (_U_(0x3) << PDEC_CTRLA_MODE_Pos)
89 #define PDEC_CTRLA_MODE(value) (PDEC_CTRLA_MODE_Msk & ((value) << PDEC_CTRLA_MODE_Pos))
90 #define PDEC_CTRLA_MODE_QDEC_Val _U_(0x0)
91 #define PDEC_CTRLA_MODE_HALL_Val _U_(0x1)
92 #define PDEC_CTRLA_MODE_COUNTER_Val _U_(0x2)
93 #define PDEC_CTRLA_MODE_QDEC (PDEC_CTRLA_MODE_QDEC_Val << PDEC_CTRLA_MODE_Pos)
94 #define PDEC_CTRLA_MODE_HALL (PDEC_CTRLA_MODE_HALL_Val << PDEC_CTRLA_MODE_Pos)
95 #define PDEC_CTRLA_MODE_COUNTER (PDEC_CTRLA_MODE_COUNTER_Val << PDEC_CTRLA_MODE_Pos)
96 #define PDEC_CTRLA_RUNSTDBY_Pos 6
97 #define PDEC_CTRLA_RUNSTDBY (_U_(0x1) << PDEC_CTRLA_RUNSTDBY_Pos)
98 #define PDEC_CTRLA_CONF_Pos 8
99 #define PDEC_CTRLA_CONF_Msk (_U_(0x7) << PDEC_CTRLA_CONF_Pos)
100 #define PDEC_CTRLA_CONF(value) (PDEC_CTRLA_CONF_Msk & ((value) << PDEC_CTRLA_CONF_Pos))
101 #define PDEC_CTRLA_CONF_X4_Val _U_(0x0)
102 #define PDEC_CTRLA_CONF_X4S_Val _U_(0x1)
103 #define PDEC_CTRLA_CONF_X2_Val _U_(0x2)
104 #define PDEC_CTRLA_CONF_X2S_Val _U_(0x3)
105 #define PDEC_CTRLA_CONF_AUTOC_Val _U_(0x4)
106 #define PDEC_CTRLA_CONF_X4 (PDEC_CTRLA_CONF_X4_Val << PDEC_CTRLA_CONF_Pos)
107 #define PDEC_CTRLA_CONF_X4S (PDEC_CTRLA_CONF_X4S_Val << PDEC_CTRLA_CONF_Pos)
108 #define PDEC_CTRLA_CONF_X2 (PDEC_CTRLA_CONF_X2_Val << PDEC_CTRLA_CONF_Pos)
109 #define PDEC_CTRLA_CONF_X2S (PDEC_CTRLA_CONF_X2S_Val << PDEC_CTRLA_CONF_Pos)
110 #define PDEC_CTRLA_CONF_AUTOC (PDEC_CTRLA_CONF_AUTOC_Val << PDEC_CTRLA_CONF_Pos)
111 #define PDEC_CTRLA_ALOCK_Pos 11
112 #define PDEC_CTRLA_ALOCK (_U_(0x1) << PDEC_CTRLA_ALOCK_Pos)
113 #define PDEC_CTRLA_SWAP_Pos 14
114 #define PDEC_CTRLA_SWAP (_U_(0x1) << PDEC_CTRLA_SWAP_Pos)
115 #define PDEC_CTRLA_PEREN_Pos 15
116 #define PDEC_CTRLA_PEREN (_U_(0x1) << PDEC_CTRLA_PEREN_Pos)
117 #define PDEC_CTRLA_PINEN0_Pos 16
118 #define PDEC_CTRLA_PINEN0 (_U_(1) << PDEC_CTRLA_PINEN0_Pos)
119 #define PDEC_CTRLA_PINEN1_Pos 17
120 #define PDEC_CTRLA_PINEN1 (_U_(1) << PDEC_CTRLA_PINEN1_Pos)
121 #define PDEC_CTRLA_PINEN2_Pos 18
122 #define PDEC_CTRLA_PINEN2 (_U_(1) << PDEC_CTRLA_PINEN2_Pos)
123 #define PDEC_CTRLA_PINEN_Pos 16
124 #define PDEC_CTRLA_PINEN_Msk (_U_(0x7) << PDEC_CTRLA_PINEN_Pos)
125 #define PDEC_CTRLA_PINEN(value) (PDEC_CTRLA_PINEN_Msk & ((value) << PDEC_CTRLA_PINEN_Pos))
126 #define PDEC_CTRLA_PINVEN0_Pos 20
127 #define PDEC_CTRLA_PINVEN0 (_U_(1) << PDEC_CTRLA_PINVEN0_Pos)
128 #define PDEC_CTRLA_PINVEN1_Pos 21
129 #define PDEC_CTRLA_PINVEN1 (_U_(1) << PDEC_CTRLA_PINVEN1_Pos)
130 #define PDEC_CTRLA_PINVEN2_Pos 22
131 #define PDEC_CTRLA_PINVEN2 (_U_(1) << PDEC_CTRLA_PINVEN2_Pos)
132 #define PDEC_CTRLA_PINVEN_Pos 20
133 #define PDEC_CTRLA_PINVEN_Msk (_U_(0x7) << PDEC_CTRLA_PINVEN_Pos)
134 #define PDEC_CTRLA_PINVEN(value) (PDEC_CTRLA_PINVEN_Msk & ((value) << PDEC_CTRLA_PINVEN_Pos))
135 #define PDEC_CTRLA_ANGULAR_Pos 24
136 #define PDEC_CTRLA_ANGULAR_Msk (_U_(0x7) << PDEC_CTRLA_ANGULAR_Pos)
137 #define PDEC_CTRLA_ANGULAR(value) (PDEC_CTRLA_ANGULAR_Msk & ((value) << PDEC_CTRLA_ANGULAR_Pos))
138 #define PDEC_CTRLA_MAXCMP_Pos 28
139 #define PDEC_CTRLA_MAXCMP_Msk (_U_(0xF) << PDEC_CTRLA_MAXCMP_Pos)
140 #define PDEC_CTRLA_MAXCMP(value) (PDEC_CTRLA_MAXCMP_Msk & ((value) << PDEC_CTRLA_MAXCMP_Pos))
141 #define PDEC_CTRLA_MASK _U_(0xF777CF4F)
144 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
156 #define PDEC_CTRLBCLR_OFFSET 0x04
157 #define PDEC_CTRLBCLR_RESETVALUE _U_(0x00)
159 #define PDEC_CTRLBCLR_LUPD_Pos 1
160 #define PDEC_CTRLBCLR_LUPD (_U_(0x1) << PDEC_CTRLBCLR_LUPD_Pos)
161 #define PDEC_CTRLBCLR_CMD_Pos 5
162 #define PDEC_CTRLBCLR_CMD_Msk (_U_(0x7) << PDEC_CTRLBCLR_CMD_Pos)
163 #define PDEC_CTRLBCLR_CMD(value) (PDEC_CTRLBCLR_CMD_Msk & ((value) << PDEC_CTRLBCLR_CMD_Pos))
164 #define PDEC_CTRLBCLR_CMD_NONE_Val _U_(0x0)
165 #define PDEC_CTRLBCLR_CMD_RETRIGGER_Val _U_(0x1)
166 #define PDEC_CTRLBCLR_CMD_UPDATE_Val _U_(0x2)
167 #define PDEC_CTRLBCLR_CMD_READSYNC_Val _U_(0x3)
168 #define PDEC_CTRLBCLR_CMD_START_Val _U_(0x4)
169 #define PDEC_CTRLBCLR_CMD_STOP_Val _U_(0x5)
170 #define PDEC_CTRLBCLR_CMD_NONE (PDEC_CTRLBCLR_CMD_NONE_Val << PDEC_CTRLBCLR_CMD_Pos)
171 #define PDEC_CTRLBCLR_CMD_RETRIGGER (PDEC_CTRLBCLR_CMD_RETRIGGER_Val << PDEC_CTRLBCLR_CMD_Pos)
172 #define PDEC_CTRLBCLR_CMD_UPDATE (PDEC_CTRLBCLR_CMD_UPDATE_Val << PDEC_CTRLBCLR_CMD_Pos)
173 #define PDEC_CTRLBCLR_CMD_READSYNC (PDEC_CTRLBCLR_CMD_READSYNC_Val << PDEC_CTRLBCLR_CMD_Pos)
174 #define PDEC_CTRLBCLR_CMD_START (PDEC_CTRLBCLR_CMD_START_Val << PDEC_CTRLBCLR_CMD_Pos)
175 #define PDEC_CTRLBCLR_CMD_STOP (PDEC_CTRLBCLR_CMD_STOP_Val << PDEC_CTRLBCLR_CMD_Pos)
176 #define PDEC_CTRLBCLR_MASK _U_(0xE2)
179 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
191 #define PDEC_CTRLBSET_OFFSET 0x05
192 #define PDEC_CTRLBSET_RESETVALUE _U_(0x00)
194 #define PDEC_CTRLBSET_LUPD_Pos 1
195 #define PDEC_CTRLBSET_LUPD (_U_(0x1) << PDEC_CTRLBSET_LUPD_Pos)
196 #define PDEC_CTRLBSET_CMD_Pos 5
197 #define PDEC_CTRLBSET_CMD_Msk (_U_(0x7) << PDEC_CTRLBSET_CMD_Pos)
198 #define PDEC_CTRLBSET_CMD(value) (PDEC_CTRLBSET_CMD_Msk & ((value) << PDEC_CTRLBSET_CMD_Pos))
199 #define PDEC_CTRLBSET_CMD_NONE_Val _U_(0x0)
200 #define PDEC_CTRLBSET_CMD_RETRIGGER_Val _U_(0x1)
201 #define PDEC_CTRLBSET_CMD_UPDATE_Val _U_(0x2)
202 #define PDEC_CTRLBSET_CMD_READSYNC_Val _U_(0x3)
203 #define PDEC_CTRLBSET_CMD_START_Val _U_(0x4)
204 #define PDEC_CTRLBSET_CMD_STOP_Val _U_(0x5)
205 #define PDEC_CTRLBSET_CMD_NONE (PDEC_CTRLBSET_CMD_NONE_Val << PDEC_CTRLBSET_CMD_Pos)
206 #define PDEC_CTRLBSET_CMD_RETRIGGER (PDEC_CTRLBSET_CMD_RETRIGGER_Val << PDEC_CTRLBSET_CMD_Pos)
207 #define PDEC_CTRLBSET_CMD_UPDATE (PDEC_CTRLBSET_CMD_UPDATE_Val << PDEC_CTRLBSET_CMD_Pos)
208 #define PDEC_CTRLBSET_CMD_READSYNC (PDEC_CTRLBSET_CMD_READSYNC_Val << PDEC_CTRLBSET_CMD_Pos)
209 #define PDEC_CTRLBSET_CMD_START (PDEC_CTRLBSET_CMD_START_Val << PDEC_CTRLBSET_CMD_Pos)
210 #define PDEC_CTRLBSET_CMD_STOP (PDEC_CTRLBSET_CMD_STOP_Val << PDEC_CTRLBSET_CMD_Pos)
211 #define PDEC_CTRLBSET_MASK _U_(0xE2)
214 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
237 #define PDEC_EVCTRL_OFFSET 0x06
238 #define PDEC_EVCTRL_RESETVALUE _U_(0x0000)
240 #define PDEC_EVCTRL_EVACT_Pos 0
241 #define PDEC_EVCTRL_EVACT_Msk (_U_(0x3) << PDEC_EVCTRL_EVACT_Pos)
242 #define PDEC_EVCTRL_EVACT(value) (PDEC_EVCTRL_EVACT_Msk & ((value) << PDEC_EVCTRL_EVACT_Pos))
243 #define PDEC_EVCTRL_EVACT_OFF_Val _U_(0x0)
244 #define PDEC_EVCTRL_EVACT_RETRIGGER_Val _U_(0x1)
245 #define PDEC_EVCTRL_EVACT_COUNT_Val _U_(0x2)
246 #define PDEC_EVCTRL_EVACT_OFF (PDEC_EVCTRL_EVACT_OFF_Val << PDEC_EVCTRL_EVACT_Pos)
247 #define PDEC_EVCTRL_EVACT_RETRIGGER (PDEC_EVCTRL_EVACT_RETRIGGER_Val << PDEC_EVCTRL_EVACT_Pos)
248 #define PDEC_EVCTRL_EVACT_COUNT (PDEC_EVCTRL_EVACT_COUNT_Val << PDEC_EVCTRL_EVACT_Pos)
249 #define PDEC_EVCTRL_EVINV_Pos 2
250 #define PDEC_EVCTRL_EVINV_Msk (_U_(0x7) << PDEC_EVCTRL_EVINV_Pos)
251 #define PDEC_EVCTRL_EVINV(value) (PDEC_EVCTRL_EVINV_Msk & ((value) << PDEC_EVCTRL_EVINV_Pos))
252 #define PDEC_EVCTRL_EVEI_Pos 5
253 #define PDEC_EVCTRL_EVEI_Msk (_U_(0x7) << PDEC_EVCTRL_EVEI_Pos)
254 #define PDEC_EVCTRL_EVEI(value) (PDEC_EVCTRL_EVEI_Msk & ((value) << PDEC_EVCTRL_EVEI_Pos))
255 #define PDEC_EVCTRL_OVFEO_Pos 8
256 #define PDEC_EVCTRL_OVFEO (_U_(0x1) << PDEC_EVCTRL_OVFEO_Pos)
257 #define PDEC_EVCTRL_ERREO_Pos 9
258 #define PDEC_EVCTRL_ERREO (_U_(0x1) << PDEC_EVCTRL_ERREO_Pos)
259 #define PDEC_EVCTRL_DIREO_Pos 10
260 #define PDEC_EVCTRL_DIREO (_U_(0x1) << PDEC_EVCTRL_DIREO_Pos)
261 #define PDEC_EVCTRL_VLCEO_Pos 11
262 #define PDEC_EVCTRL_VLCEO (_U_(0x1) << PDEC_EVCTRL_VLCEO_Pos)
263 #define PDEC_EVCTRL_MCEO0_Pos 12
264 #define PDEC_EVCTRL_MCEO0 (_U_(1) << PDEC_EVCTRL_MCEO0_Pos)
265 #define PDEC_EVCTRL_MCEO1_Pos 13
266 #define PDEC_EVCTRL_MCEO1 (_U_(1) << PDEC_EVCTRL_MCEO1_Pos)
267 #define PDEC_EVCTRL_MCEO_Pos 12
268 #define PDEC_EVCTRL_MCEO_Msk (_U_(0x3) << PDEC_EVCTRL_MCEO_Pos)
269 #define PDEC_EVCTRL_MCEO(value) (PDEC_EVCTRL_MCEO_Msk & ((value) << PDEC_EVCTRL_MCEO_Pos))
270 #define PDEC_EVCTRL_MASK _U_(0x3FFF)
273 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
293 #define PDEC_INTENCLR_OFFSET 0x08
294 #define PDEC_INTENCLR_RESETVALUE _U_(0x00)
296 #define PDEC_INTENCLR_OVF_Pos 0
297 #define PDEC_INTENCLR_OVF (_U_(0x1) << PDEC_INTENCLR_OVF_Pos)
298 #define PDEC_INTENCLR_ERR_Pos 1
299 #define PDEC_INTENCLR_ERR (_U_(0x1) << PDEC_INTENCLR_ERR_Pos)
300 #define PDEC_INTENCLR_DIR_Pos 2
301 #define PDEC_INTENCLR_DIR (_U_(0x1) << PDEC_INTENCLR_DIR_Pos)
302 #define PDEC_INTENCLR_VLC_Pos 3
303 #define PDEC_INTENCLR_VLC (_U_(0x1) << PDEC_INTENCLR_VLC_Pos)
304 #define PDEC_INTENCLR_MC0_Pos 4
305 #define PDEC_INTENCLR_MC0 (_U_(1) << PDEC_INTENCLR_MC0_Pos)
306 #define PDEC_INTENCLR_MC1_Pos 5
307 #define PDEC_INTENCLR_MC1 (_U_(1) << PDEC_INTENCLR_MC1_Pos)
308 #define PDEC_INTENCLR_MC_Pos 4
309 #define PDEC_INTENCLR_MC_Msk (_U_(0x3) << PDEC_INTENCLR_MC_Pos)
310 #define PDEC_INTENCLR_MC(value) (PDEC_INTENCLR_MC_Msk & ((value) << PDEC_INTENCLR_MC_Pos))
311 #define PDEC_INTENCLR_MASK _U_(0x3F)
314 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
334 #define PDEC_INTENSET_OFFSET 0x09
335 #define PDEC_INTENSET_RESETVALUE _U_(0x00)
337 #define PDEC_INTENSET_OVF_Pos 0
338 #define PDEC_INTENSET_OVF (_U_(0x1) << PDEC_INTENSET_OVF_Pos)
339 #define PDEC_INTENSET_ERR_Pos 1
340 #define PDEC_INTENSET_ERR (_U_(0x1) << PDEC_INTENSET_ERR_Pos)
341 #define PDEC_INTENSET_DIR_Pos 2
342 #define PDEC_INTENSET_DIR (_U_(0x1) << PDEC_INTENSET_DIR_Pos)
343 #define PDEC_INTENSET_VLC_Pos 3
344 #define PDEC_INTENSET_VLC (_U_(0x1) << PDEC_INTENSET_VLC_Pos)
345 #define PDEC_INTENSET_MC0_Pos 4
346 #define PDEC_INTENSET_MC0 (_U_(1) << PDEC_INTENSET_MC0_Pos)
347 #define PDEC_INTENSET_MC1_Pos 5
348 #define PDEC_INTENSET_MC1 (_U_(1) << PDEC_INTENSET_MC1_Pos)
349 #define PDEC_INTENSET_MC_Pos 4
350 #define PDEC_INTENSET_MC_Msk (_U_(0x3) << PDEC_INTENSET_MC_Pos)
351 #define PDEC_INTENSET_MC(value) (PDEC_INTENSET_MC_Msk & ((value) << PDEC_INTENSET_MC_Pos))
352 #define PDEC_INTENSET_MASK _U_(0x3F)
355 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
375 #define PDEC_INTFLAG_OFFSET 0x0A
376 #define PDEC_INTFLAG_RESETVALUE _U_(0x00)
378 #define PDEC_INTFLAG_OVF_Pos 0
379 #define PDEC_INTFLAG_OVF (_U_(0x1) << PDEC_INTFLAG_OVF_Pos)
380 #define PDEC_INTFLAG_ERR_Pos 1
381 #define PDEC_INTFLAG_ERR (_U_(0x1) << PDEC_INTFLAG_ERR_Pos)
382 #define PDEC_INTFLAG_DIR_Pos 2
383 #define PDEC_INTFLAG_DIR (_U_(0x1) << PDEC_INTFLAG_DIR_Pos)
384 #define PDEC_INTFLAG_VLC_Pos 3
385 #define PDEC_INTFLAG_VLC (_U_(0x1) << PDEC_INTFLAG_VLC_Pos)
386 #define PDEC_INTFLAG_MC0_Pos 4
387 #define PDEC_INTFLAG_MC0 (_U_(1) << PDEC_INTFLAG_MC0_Pos)
388 #define PDEC_INTFLAG_MC1_Pos 5
389 #define PDEC_INTFLAG_MC1 (_U_(1) << PDEC_INTFLAG_MC1_Pos)
390 #define PDEC_INTFLAG_MC_Pos 4
391 #define PDEC_INTFLAG_MC_Msk (_U_(0x3) << PDEC_INTFLAG_MC_Pos)
392 #define PDEC_INTFLAG_MC(value) (PDEC_INTFLAG_MC_Msk & ((value) << PDEC_INTFLAG_MC_Pos))
393 #define PDEC_INTFLAG_MASK _U_(0x3F)
396 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
423 #define PDEC_STATUS_OFFSET 0x0C
424 #define PDEC_STATUS_RESETVALUE _U_(0x0040)
426 #define PDEC_STATUS_QERR_Pos 0
427 #define PDEC_STATUS_QERR (_U_(0x1) << PDEC_STATUS_QERR_Pos)
428 #define PDEC_STATUS_IDXERR_Pos 1
429 #define PDEC_STATUS_IDXERR (_U_(0x1) << PDEC_STATUS_IDXERR_Pos)
430 #define PDEC_STATUS_MPERR_Pos 2
431 #define PDEC_STATUS_MPERR (_U_(0x1) << PDEC_STATUS_MPERR_Pos)
432 #define PDEC_STATUS_WINERR_Pos 4
433 #define PDEC_STATUS_WINERR (_U_(0x1) << PDEC_STATUS_WINERR_Pos)
434 #define PDEC_STATUS_HERR_Pos 5
435 #define PDEC_STATUS_HERR (_U_(0x1) << PDEC_STATUS_HERR_Pos)
436 #define PDEC_STATUS_STOP_Pos 6
437 #define PDEC_STATUS_STOP (_U_(0x1) << PDEC_STATUS_STOP_Pos)
438 #define PDEC_STATUS_DIR_Pos 7
439 #define PDEC_STATUS_DIR (_U_(0x1) << PDEC_STATUS_DIR_Pos)
440 #define PDEC_STATUS_PRESCBUFV_Pos 8
441 #define PDEC_STATUS_PRESCBUFV (_U_(0x1) << PDEC_STATUS_PRESCBUFV_Pos)
442 #define PDEC_STATUS_FILTERBUFV_Pos 9
443 #define PDEC_STATUS_FILTERBUFV (_U_(0x1) << PDEC_STATUS_FILTERBUFV_Pos)
444 #define PDEC_STATUS_CCBUFV0_Pos 12
445 #define PDEC_STATUS_CCBUFV0 (_U_(1) << PDEC_STATUS_CCBUFV0_Pos)
446 #define PDEC_STATUS_CCBUFV1_Pos 13
447 #define PDEC_STATUS_CCBUFV1 (_U_(1) << PDEC_STATUS_CCBUFV1_Pos)
448 #define PDEC_STATUS_CCBUFV_Pos 12
449 #define PDEC_STATUS_CCBUFV_Msk (_U_(0x3) << PDEC_STATUS_CCBUFV_Pos)
450 #define PDEC_STATUS_CCBUFV(value) (PDEC_STATUS_CCBUFV_Msk & ((value) << PDEC_STATUS_CCBUFV_Pos))
451 #define PDEC_STATUS_MASK _U_(0x33F7)
454 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
464 #define PDEC_DBGCTRL_OFFSET 0x0F
465 #define PDEC_DBGCTRL_RESETVALUE _U_(0x00)
467 #define PDEC_DBGCTRL_DBGRUN_Pos 0
468 #define PDEC_DBGCTRL_DBGRUN (_U_(0x1) << PDEC_DBGCTRL_DBGRUN_Pos)
469 #define PDEC_DBGCTRL_MASK _U_(0x01)
472 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
495 #define PDEC_SYNCBUSY_OFFSET 0x10
496 #define PDEC_SYNCBUSY_RESETVALUE _U_(0x00000000)
498 #define PDEC_SYNCBUSY_SWRST_Pos 0
499 #define PDEC_SYNCBUSY_SWRST (_U_(0x1) << PDEC_SYNCBUSY_SWRST_Pos)
500 #define PDEC_SYNCBUSY_ENABLE_Pos 1
501 #define PDEC_SYNCBUSY_ENABLE (_U_(0x1) << PDEC_SYNCBUSY_ENABLE_Pos)
502 #define PDEC_SYNCBUSY_CTRLB_Pos 2
503 #define PDEC_SYNCBUSY_CTRLB (_U_(0x1) << PDEC_SYNCBUSY_CTRLB_Pos)
504 #define PDEC_SYNCBUSY_STATUS_Pos 3
505 #define PDEC_SYNCBUSY_STATUS (_U_(0x1) << PDEC_SYNCBUSY_STATUS_Pos)
506 #define PDEC_SYNCBUSY_PRESC_Pos 4
507 #define PDEC_SYNCBUSY_PRESC (_U_(0x1) << PDEC_SYNCBUSY_PRESC_Pos)
508 #define PDEC_SYNCBUSY_FILTER_Pos 5
509 #define PDEC_SYNCBUSY_FILTER (_U_(0x1) << PDEC_SYNCBUSY_FILTER_Pos)
510 #define PDEC_SYNCBUSY_COUNT_Pos 6
511 #define PDEC_SYNCBUSY_COUNT (_U_(0x1) << PDEC_SYNCBUSY_COUNT_Pos)
512 #define PDEC_SYNCBUSY_CC0_Pos 7
513 #define PDEC_SYNCBUSY_CC0 (_U_(1) << PDEC_SYNCBUSY_CC0_Pos)
514 #define PDEC_SYNCBUSY_CC1_Pos 8
515 #define PDEC_SYNCBUSY_CC1 (_U_(1) << PDEC_SYNCBUSY_CC1_Pos)
516 #define PDEC_SYNCBUSY_CC_Pos 7
517 #define PDEC_SYNCBUSY_CC_Msk (_U_(0x3) << PDEC_SYNCBUSY_CC_Pos)
518 #define PDEC_SYNCBUSY_CC(value) (PDEC_SYNCBUSY_CC_Msk & ((value) << PDEC_SYNCBUSY_CC_Pos))
519 #define PDEC_SYNCBUSY_MASK _U_(0x000001FF)
522 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
532 #define PDEC_PRESC_OFFSET 0x14
533 #define PDEC_PRESC_RESETVALUE _U_(0x00)
535 #define PDEC_PRESC_PRESC_Pos 0
536 #define PDEC_PRESC_PRESC_Msk (_U_(0xF) << PDEC_PRESC_PRESC_Pos)
537 #define PDEC_PRESC_PRESC(value) (PDEC_PRESC_PRESC_Msk & ((value) << PDEC_PRESC_PRESC_Pos))
538 #define PDEC_PRESC_PRESC_DIV1_Val _U_(0x0)
539 #define PDEC_PRESC_PRESC_DIV2_Val _U_(0x1)
540 #define PDEC_PRESC_PRESC_DIV4_Val _U_(0x2)
541 #define PDEC_PRESC_PRESC_DIV8_Val _U_(0x3)
542 #define PDEC_PRESC_PRESC_DIV16_Val _U_(0x4)
543 #define PDEC_PRESC_PRESC_DIV32_Val _U_(0x5)
544 #define PDEC_PRESC_PRESC_DIV64_Val _U_(0x6)
545 #define PDEC_PRESC_PRESC_DIV128_Val _U_(0x7)
546 #define PDEC_PRESC_PRESC_DIV256_Val _U_(0x8)
547 #define PDEC_PRESC_PRESC_DIV512_Val _U_(0x9)
548 #define PDEC_PRESC_PRESC_DIV1024_Val _U_(0xA)
549 #define PDEC_PRESC_PRESC_DIV1 (PDEC_PRESC_PRESC_DIV1_Val << PDEC_PRESC_PRESC_Pos)
550 #define PDEC_PRESC_PRESC_DIV2 (PDEC_PRESC_PRESC_DIV2_Val << PDEC_PRESC_PRESC_Pos)
551 #define PDEC_PRESC_PRESC_DIV4 (PDEC_PRESC_PRESC_DIV4_Val << PDEC_PRESC_PRESC_Pos)
552 #define PDEC_PRESC_PRESC_DIV8 (PDEC_PRESC_PRESC_DIV8_Val << PDEC_PRESC_PRESC_Pos)
553 #define PDEC_PRESC_PRESC_DIV16 (PDEC_PRESC_PRESC_DIV16_Val << PDEC_PRESC_PRESC_Pos)
554 #define PDEC_PRESC_PRESC_DIV32 (PDEC_PRESC_PRESC_DIV32_Val << PDEC_PRESC_PRESC_Pos)
555 #define PDEC_PRESC_PRESC_DIV64 (PDEC_PRESC_PRESC_DIV64_Val << PDEC_PRESC_PRESC_Pos)
556 #define PDEC_PRESC_PRESC_DIV128 (PDEC_PRESC_PRESC_DIV128_Val << PDEC_PRESC_PRESC_Pos)
557 #define PDEC_PRESC_PRESC_DIV256 (PDEC_PRESC_PRESC_DIV256_Val << PDEC_PRESC_PRESC_Pos)
558 #define PDEC_PRESC_PRESC_DIV512 (PDEC_PRESC_PRESC_DIV512_Val << PDEC_PRESC_PRESC_Pos)
559 #define PDEC_PRESC_PRESC_DIV1024 (PDEC_PRESC_PRESC_DIV1024_Val << PDEC_PRESC_PRESC_Pos)
560 #define PDEC_PRESC_MASK _U_(0x0F)
563 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
572 #define PDEC_FILTER_OFFSET 0x15
573 #define PDEC_FILTER_RESETVALUE _U_(0x00)
575 #define PDEC_FILTER_FILTER_Pos 0
576 #define PDEC_FILTER_FILTER_Msk (_U_(0xFF) << PDEC_FILTER_FILTER_Pos)
577 #define PDEC_FILTER_FILTER(value) (PDEC_FILTER_FILTER_Msk & ((value) << PDEC_FILTER_FILTER_Pos))
578 #define PDEC_FILTER_MASK _U_(0xFF)
581 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
591 #define PDEC_PRESCBUF_OFFSET 0x18
592 #define PDEC_PRESCBUF_RESETVALUE _U_(0x00)
594 #define PDEC_PRESCBUF_PRESCBUF_Pos 0
595 #define PDEC_PRESCBUF_PRESCBUF_Msk (_U_(0xF) << PDEC_PRESCBUF_PRESCBUF_Pos)
596 #define PDEC_PRESCBUF_PRESCBUF(value) (PDEC_PRESCBUF_PRESCBUF_Msk & ((value) << PDEC_PRESCBUF_PRESCBUF_Pos))
597 #define PDEC_PRESCBUF_PRESCBUF_DIV1_Val _U_(0x0)
598 #define PDEC_PRESCBUF_PRESCBUF_DIV2_Val _U_(0x1)
599 #define PDEC_PRESCBUF_PRESCBUF_DIV4_Val _U_(0x2)
600 #define PDEC_PRESCBUF_PRESCBUF_DIV8_Val _U_(0x3)
601 #define PDEC_PRESCBUF_PRESCBUF_DIV16_Val _U_(0x4)
602 #define PDEC_PRESCBUF_PRESCBUF_DIV32_Val _U_(0x5)
603 #define PDEC_PRESCBUF_PRESCBUF_DIV64_Val _U_(0x6)
604 #define PDEC_PRESCBUF_PRESCBUF_DIV128_Val _U_(0x7)
605 #define PDEC_PRESCBUF_PRESCBUF_DIV256_Val _U_(0x8)
606 #define PDEC_PRESCBUF_PRESCBUF_DIV512_Val _U_(0x9)
607 #define PDEC_PRESCBUF_PRESCBUF_DIV1024_Val _U_(0xA)
608 #define PDEC_PRESCBUF_PRESCBUF_DIV1 (PDEC_PRESCBUF_PRESCBUF_DIV1_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
609 #define PDEC_PRESCBUF_PRESCBUF_DIV2 (PDEC_PRESCBUF_PRESCBUF_DIV2_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
610 #define PDEC_PRESCBUF_PRESCBUF_DIV4 (PDEC_PRESCBUF_PRESCBUF_DIV4_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
611 #define PDEC_PRESCBUF_PRESCBUF_DIV8 (PDEC_PRESCBUF_PRESCBUF_DIV8_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
612 #define PDEC_PRESCBUF_PRESCBUF_DIV16 (PDEC_PRESCBUF_PRESCBUF_DIV16_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
613 #define PDEC_PRESCBUF_PRESCBUF_DIV32 (PDEC_PRESCBUF_PRESCBUF_DIV32_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
614 #define PDEC_PRESCBUF_PRESCBUF_DIV64 (PDEC_PRESCBUF_PRESCBUF_DIV64_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
615 #define PDEC_PRESCBUF_PRESCBUF_DIV128 (PDEC_PRESCBUF_PRESCBUF_DIV128_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
616 #define PDEC_PRESCBUF_PRESCBUF_DIV256 (PDEC_PRESCBUF_PRESCBUF_DIV256_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
617 #define PDEC_PRESCBUF_PRESCBUF_DIV512 (PDEC_PRESCBUF_PRESCBUF_DIV512_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
618 #define PDEC_PRESCBUF_PRESCBUF_DIV1024 (PDEC_PRESCBUF_PRESCBUF_DIV1024_Val << PDEC_PRESCBUF_PRESCBUF_Pos)
619 #define PDEC_PRESCBUF_MASK _U_(0x0F)
622 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
631 #define PDEC_FILTERBUF_OFFSET 0x19
632 #define PDEC_FILTERBUF_RESETVALUE _U_(0x00)
634 #define PDEC_FILTERBUF_FILTERBUF_Pos 0
635 #define PDEC_FILTERBUF_FILTERBUF_Msk (_U_(0xFF) << PDEC_FILTERBUF_FILTERBUF_Pos)
636 #define PDEC_FILTERBUF_FILTERBUF(value) (PDEC_FILTERBUF_FILTERBUF_Msk & ((value) << PDEC_FILTERBUF_FILTERBUF_Pos))
637 #define PDEC_FILTERBUF_MASK _U_(0xFF)
640 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
650 #define PDEC_COUNT_OFFSET 0x1C
651 #define PDEC_COUNT_RESETVALUE _U_(0x00000000)
653 #define PDEC_COUNT_COUNT_Pos 0
654 #define PDEC_COUNT_COUNT_Msk (_U_(0xFFFF) << PDEC_COUNT_COUNT_Pos)
655 #define PDEC_COUNT_COUNT(value) (PDEC_COUNT_COUNT_Msk & ((value) << PDEC_COUNT_COUNT_Pos))
656 #define PDEC_COUNT_MASK _U_(0x0000FFFF)
659 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
669 #define PDEC_CC_OFFSET 0x20
670 #define PDEC_CC_RESETVALUE _U_(0x00000000)
672 #define PDEC_CC_CC_Pos 0
673 #define PDEC_CC_CC_Msk (_U_(0xFFFF) << PDEC_CC_CC_Pos)
674 #define PDEC_CC_CC(value) (PDEC_CC_CC_Msk & ((value) << PDEC_CC_CC_Pos))
675 #define PDEC_CC_MASK _U_(0x0000FFFF)
678 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
688 #define PDEC_CCBUF_OFFSET 0x30
689 #define PDEC_CCBUF_RESETVALUE _U_(0x00000000)
691 #define PDEC_CCBUF_CCBUF_Pos 0
692 #define PDEC_CCBUF_CCBUF_Msk (_U_(0xFFFF) << PDEC_CCBUF_CCBUF_Pos)
693 #define PDEC_CCBUF_CCBUF(value) (PDEC_CCBUF_CCBUF_Msk & ((value) << PDEC_CCBUF_CCBUF_Pos))
694 #define PDEC_CCBUF_MASK _U_(0x0000FFFF)
697 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
__IO PDEC_INTENCLR_Type INTENCLR
Offset: 0x08 (R/W 8) Interrupt Enable Clear.
__IO PDEC_FILTERBUF_Type FILTERBUF
Offset: 0x19 (R/W 8) Filter Buffer Value.
__IO PDEC_FILTER_Type FILTER
Offset: 0x15 (R/W 8) Filter Value.
__IO PDEC_PRESC_Type PRESC
Offset: 0x14 (R/W 8) Prescaler Value.
__IO PDEC_EVCTRL_Type EVCTRL
Offset: 0x06 (R/W 16) Event Control.
__IO PDEC_INTENSET_Type INTENSET
Offset: 0x09 (R/W 8) Interrupt Enable Set.
__IO PDEC_CTRLBCLR_Type CTRLBCLR
Offset: 0x04 (R/W 8) Control B Clear.
__IO PDEC_COUNT_Type COUNT
Offset: 0x1C (R/W 32) Counter Value.
__I PDEC_SYNCBUSY_Type SYNCBUSY
Offset: 0x10 (R/ 32) Synchronization Status.
__IO PDEC_CTRLBSET_Type CTRLBSET
Offset: 0x05 (R/W 8) Control B Set.
__IO PDEC_PRESCBUF_Type PRESCBUF
Offset: 0x18 (R/W 8) Prescaler Buffer Value.
__IO PDEC_STATUS_Type STATUS
Offset: 0x0C (R/W 16) Status.
volatile const uint8_t RoReg8
__IO PDEC_CTRLA_Type CTRLA
Offset: 0x00 (R/W 32) Control A.
__IO PDEC_DBGCTRL_Type DBGCTRL
Offset: 0x0F (R/W 8) Debug Control.
__IO PDEC_INTFLAG_Type INTFLAG
Offset: 0x0A (R/W 8) Interrupt Flag Status and Clear.