SAME54P20A Test Project
usb.h
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1 
30 #ifndef _SAME54_USB_COMPONENT_
31 #define _SAME54_USB_COMPONENT_
32 
33 /* ========================================================================== */
35 /* ========================================================================== */
38 
39 #define USB_U2222
40 #define REV_USB 0x120
41 
42 /* -------- USB_CTRLA : (USB Offset: 0x000) (R/W 8) Control A -------- */
43 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
44 typedef union {
45  struct {
46  uint8_t SWRST:1;
47  uint8_t ENABLE:1;
48  uint8_t RUNSTDBY:1;
49  uint8_t :4;
50  uint8_t MODE:1;
51  } bit;
52  uint8_t reg;
54 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
55 
56 #define USB_CTRLA_OFFSET 0x000
57 #define USB_CTRLA_RESETVALUE _U_(0x00)
59 #define USB_CTRLA_SWRST_Pos 0
60 #define USB_CTRLA_SWRST (_U_(0x1) << USB_CTRLA_SWRST_Pos)
61 #define USB_CTRLA_ENABLE_Pos 1
62 #define USB_CTRLA_ENABLE (_U_(0x1) << USB_CTRLA_ENABLE_Pos)
63 #define USB_CTRLA_RUNSTDBY_Pos 2
64 #define USB_CTRLA_RUNSTDBY (_U_(0x1) << USB_CTRLA_RUNSTDBY_Pos)
65 #define USB_CTRLA_MODE_Pos 7
66 #define USB_CTRLA_MODE (_U_(0x1) << USB_CTRLA_MODE_Pos)
67 #define USB_CTRLA_MODE_DEVICE_Val _U_(0x0)
68 #define USB_CTRLA_MODE_HOST_Val _U_(0x1)
69 #define USB_CTRLA_MODE_DEVICE (USB_CTRLA_MODE_DEVICE_Val << USB_CTRLA_MODE_Pos)
70 #define USB_CTRLA_MODE_HOST (USB_CTRLA_MODE_HOST_Val << USB_CTRLA_MODE_Pos)
71 #define USB_CTRLA_MASK _U_(0x87)
73 /* -------- USB_SYNCBUSY : (USB Offset: 0x002) (R/ 8) Synchronization Busy -------- */
74 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
75 typedef union {
76  struct {
77  uint8_t SWRST:1;
78  uint8_t ENABLE:1;
79  uint8_t :6;
80  } bit;
81  uint8_t reg;
83 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
84 
85 #define USB_SYNCBUSY_OFFSET 0x002
86 #define USB_SYNCBUSY_RESETVALUE _U_(0x00)
88 #define USB_SYNCBUSY_SWRST_Pos 0
89 #define USB_SYNCBUSY_SWRST (_U_(0x1) << USB_SYNCBUSY_SWRST_Pos)
90 #define USB_SYNCBUSY_ENABLE_Pos 1
91 #define USB_SYNCBUSY_ENABLE (_U_(0x1) << USB_SYNCBUSY_ENABLE_Pos)
92 #define USB_SYNCBUSY_MASK _U_(0x03)
94 /* -------- USB_QOSCTRL : (USB Offset: 0x003) (R/W 8) USB Quality Of Service -------- */
95 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
96 typedef union {
97  struct {
98  uint8_t CQOS:2;
99  uint8_t DQOS:2;
100  uint8_t :4;
101  } bit;
102  uint8_t reg;
104 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
105 
106 #define USB_QOSCTRL_OFFSET 0x003
107 #define USB_QOSCTRL_RESETVALUE _U_(0x0F)
109 #define USB_QOSCTRL_CQOS_Pos 0
110 #define USB_QOSCTRL_CQOS_Msk (_U_(0x3) << USB_QOSCTRL_CQOS_Pos)
111 #define USB_QOSCTRL_CQOS(value) (USB_QOSCTRL_CQOS_Msk & ((value) << USB_QOSCTRL_CQOS_Pos))
112 #define USB_QOSCTRL_DQOS_Pos 2
113 #define USB_QOSCTRL_DQOS_Msk (_U_(0x3) << USB_QOSCTRL_DQOS_Pos)
114 #define USB_QOSCTRL_DQOS(value) (USB_QOSCTRL_DQOS_Msk & ((value) << USB_QOSCTRL_DQOS_Pos))
115 #define USB_QOSCTRL_MASK _U_(0x0F)
117 /* -------- USB_DEVICE_CTRLB : (USB Offset: 0x008) (R/W 16) DEVICE DEVICE Control B -------- */
118 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
119 typedef union {
120  struct {
121  uint16_t DETACH:1;
122  uint16_t UPRSM:1;
123  uint16_t SPDCONF:2;
124  uint16_t NREPLY:1;
125  uint16_t TSTJ:1;
126  uint16_t TSTK:1;
127  uint16_t TSTPCKT:1;
128  uint16_t OPMODE2:1;
129  uint16_t GNAK:1;
130  uint16_t LPMHDSK:2;
131  uint16_t :4;
132  } bit;
133  uint16_t reg;
135 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
136 
137 #define USB_DEVICE_CTRLB_OFFSET 0x008
138 #define USB_DEVICE_CTRLB_RESETVALUE _U_(0x0001)
140 #define USB_DEVICE_CTRLB_DETACH_Pos 0
141 #define USB_DEVICE_CTRLB_DETACH (_U_(0x1) << USB_DEVICE_CTRLB_DETACH_Pos)
142 #define USB_DEVICE_CTRLB_UPRSM_Pos 1
143 #define USB_DEVICE_CTRLB_UPRSM (_U_(0x1) << USB_DEVICE_CTRLB_UPRSM_Pos)
144 #define USB_DEVICE_CTRLB_SPDCONF_Pos 2
145 #define USB_DEVICE_CTRLB_SPDCONF_Msk (_U_(0x3) << USB_DEVICE_CTRLB_SPDCONF_Pos)
146 #define USB_DEVICE_CTRLB_SPDCONF(value) (USB_DEVICE_CTRLB_SPDCONF_Msk & ((value) << USB_DEVICE_CTRLB_SPDCONF_Pos))
147 #define USB_DEVICE_CTRLB_SPDCONF_FS_Val _U_(0x0)
148 #define USB_DEVICE_CTRLB_SPDCONF_LS_Val _U_(0x1)
149 #define USB_DEVICE_CTRLB_SPDCONF_HS_Val _U_(0x2)
150 #define USB_DEVICE_CTRLB_SPDCONF_HSTM_Val _U_(0x3)
151 #define USB_DEVICE_CTRLB_SPDCONF_FS (USB_DEVICE_CTRLB_SPDCONF_FS_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
152 #define USB_DEVICE_CTRLB_SPDCONF_LS (USB_DEVICE_CTRLB_SPDCONF_LS_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
153 #define USB_DEVICE_CTRLB_SPDCONF_HS (USB_DEVICE_CTRLB_SPDCONF_HS_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
154 #define USB_DEVICE_CTRLB_SPDCONF_HSTM (USB_DEVICE_CTRLB_SPDCONF_HSTM_Val << USB_DEVICE_CTRLB_SPDCONF_Pos)
155 #define USB_DEVICE_CTRLB_NREPLY_Pos 4
156 #define USB_DEVICE_CTRLB_NREPLY (_U_(0x1) << USB_DEVICE_CTRLB_NREPLY_Pos)
157 #define USB_DEVICE_CTRLB_TSTJ_Pos 5
158 #define USB_DEVICE_CTRLB_TSTJ (_U_(0x1) << USB_DEVICE_CTRLB_TSTJ_Pos)
159 #define USB_DEVICE_CTRLB_TSTK_Pos 6
160 #define USB_DEVICE_CTRLB_TSTK (_U_(0x1) << USB_DEVICE_CTRLB_TSTK_Pos)
161 #define USB_DEVICE_CTRLB_TSTPCKT_Pos 7
162 #define USB_DEVICE_CTRLB_TSTPCKT (_U_(0x1) << USB_DEVICE_CTRLB_TSTPCKT_Pos)
163 #define USB_DEVICE_CTRLB_OPMODE2_Pos 8
164 #define USB_DEVICE_CTRLB_OPMODE2 (_U_(0x1) << USB_DEVICE_CTRLB_OPMODE2_Pos)
165 #define USB_DEVICE_CTRLB_GNAK_Pos 9
166 #define USB_DEVICE_CTRLB_GNAK (_U_(0x1) << USB_DEVICE_CTRLB_GNAK_Pos)
167 #define USB_DEVICE_CTRLB_LPMHDSK_Pos 10
168 #define USB_DEVICE_CTRLB_LPMHDSK_Msk (_U_(0x3) << USB_DEVICE_CTRLB_LPMHDSK_Pos)
169 #define USB_DEVICE_CTRLB_LPMHDSK(value) (USB_DEVICE_CTRLB_LPMHDSK_Msk & ((value) << USB_DEVICE_CTRLB_LPMHDSK_Pos))
170 #define USB_DEVICE_CTRLB_LPMHDSK_NO_Val _U_(0x0)
171 #define USB_DEVICE_CTRLB_LPMHDSK_ACK_Val _U_(0x1)
172 #define USB_DEVICE_CTRLB_LPMHDSK_NYET_Val _U_(0x2)
173 #define USB_DEVICE_CTRLB_LPMHDSK_STALL_Val _U_(0x3)
174 #define USB_DEVICE_CTRLB_LPMHDSK_NO (USB_DEVICE_CTRLB_LPMHDSK_NO_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
175 #define USB_DEVICE_CTRLB_LPMHDSK_ACK (USB_DEVICE_CTRLB_LPMHDSK_ACK_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
176 #define USB_DEVICE_CTRLB_LPMHDSK_NYET (USB_DEVICE_CTRLB_LPMHDSK_NYET_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
177 #define USB_DEVICE_CTRLB_LPMHDSK_STALL (USB_DEVICE_CTRLB_LPMHDSK_STALL_Val << USB_DEVICE_CTRLB_LPMHDSK_Pos)
178 #define USB_DEVICE_CTRLB_MASK _U_(0x0FFF)
180 /* -------- USB_HOST_CTRLB : (USB Offset: 0x008) (R/W 16) HOST HOST Control B -------- */
181 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
182 typedef union {
183  struct {
184  uint16_t :1;
185  uint16_t RESUME:1;
186  uint16_t SPDCONF:2;
187  uint16_t AUTORESUME:1;
188  uint16_t TSTJ:1;
189  uint16_t TSTK:1;
190  uint16_t :1;
191  uint16_t SOFE:1;
192  uint16_t BUSRESET:1;
193  uint16_t VBUSOK:1;
194  uint16_t L1RESUME:1;
195  uint16_t :4;
196  } bit;
197  uint16_t reg;
199 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
200 
201 #define USB_HOST_CTRLB_OFFSET 0x008
202 #define USB_HOST_CTRLB_RESETVALUE _U_(0x0000)
204 #define USB_HOST_CTRLB_RESUME_Pos 1
205 #define USB_HOST_CTRLB_RESUME (_U_(0x1) << USB_HOST_CTRLB_RESUME_Pos)
206 #define USB_HOST_CTRLB_SPDCONF_Pos 2
207 #define USB_HOST_CTRLB_SPDCONF_Msk (_U_(0x3) << USB_HOST_CTRLB_SPDCONF_Pos)
208 #define USB_HOST_CTRLB_SPDCONF(value) (USB_HOST_CTRLB_SPDCONF_Msk & ((value) << USB_HOST_CTRLB_SPDCONF_Pos))
209 #define USB_HOST_CTRLB_SPDCONF_NORMAL_Val _U_(0x0)
210 #define USB_HOST_CTRLB_SPDCONF_FS_Val _U_(0x3)
211 #define USB_HOST_CTRLB_SPDCONF_NORMAL (USB_HOST_CTRLB_SPDCONF_NORMAL_Val << USB_HOST_CTRLB_SPDCONF_Pos)
212 #define USB_HOST_CTRLB_SPDCONF_FS (USB_HOST_CTRLB_SPDCONF_FS_Val << USB_HOST_CTRLB_SPDCONF_Pos)
213 #define USB_HOST_CTRLB_AUTORESUME_Pos 4
214 #define USB_HOST_CTRLB_AUTORESUME (_U_(0x1) << USB_HOST_CTRLB_AUTORESUME_Pos)
215 #define USB_HOST_CTRLB_TSTJ_Pos 5
216 #define USB_HOST_CTRLB_TSTJ (_U_(0x1) << USB_HOST_CTRLB_TSTJ_Pos)
217 #define USB_HOST_CTRLB_TSTK_Pos 6
218 #define USB_HOST_CTRLB_TSTK (_U_(0x1) << USB_HOST_CTRLB_TSTK_Pos)
219 #define USB_HOST_CTRLB_SOFE_Pos 8
220 #define USB_HOST_CTRLB_SOFE (_U_(0x1) << USB_HOST_CTRLB_SOFE_Pos)
221 #define USB_HOST_CTRLB_BUSRESET_Pos 9
222 #define USB_HOST_CTRLB_BUSRESET (_U_(0x1) << USB_HOST_CTRLB_BUSRESET_Pos)
223 #define USB_HOST_CTRLB_VBUSOK_Pos 10
224 #define USB_HOST_CTRLB_VBUSOK (_U_(0x1) << USB_HOST_CTRLB_VBUSOK_Pos)
225 #define USB_HOST_CTRLB_L1RESUME_Pos 11
226 #define USB_HOST_CTRLB_L1RESUME (_U_(0x1) << USB_HOST_CTRLB_L1RESUME_Pos)
227 #define USB_HOST_CTRLB_MASK _U_(0x0F7E)
229 /* -------- USB_DEVICE_DADD : (USB Offset: 0x00A) (R/W 8) DEVICE DEVICE Device Address -------- */
230 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
231 typedef union {
232  struct {
233  uint8_t DADD:7;
234  uint8_t ADDEN:1;
235  } bit;
236  uint8_t reg;
238 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
239 
240 #define USB_DEVICE_DADD_OFFSET 0x00A
241 #define USB_DEVICE_DADD_RESETVALUE _U_(0x00)
243 #define USB_DEVICE_DADD_DADD_Pos 0
244 #define USB_DEVICE_DADD_DADD_Msk (_U_(0x7F) << USB_DEVICE_DADD_DADD_Pos)
245 #define USB_DEVICE_DADD_DADD(value) (USB_DEVICE_DADD_DADD_Msk & ((value) << USB_DEVICE_DADD_DADD_Pos))
246 #define USB_DEVICE_DADD_ADDEN_Pos 7
247 #define USB_DEVICE_DADD_ADDEN (_U_(0x1) << USB_DEVICE_DADD_ADDEN_Pos)
248 #define USB_DEVICE_DADD_MASK _U_(0xFF)
250 /* -------- USB_HOST_HSOFC : (USB Offset: 0x00A) (R/W 8) HOST HOST Host Start Of Frame Control -------- */
251 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
252 typedef union {
253  struct {
254  uint8_t FLENC:4;
255  uint8_t :3;
256  uint8_t FLENCE:1;
257  } bit;
258  uint8_t reg;
260 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
261 
262 #define USB_HOST_HSOFC_OFFSET 0x00A
263 #define USB_HOST_HSOFC_RESETVALUE _U_(0x00)
265 #define USB_HOST_HSOFC_FLENC_Pos 0
266 #define USB_HOST_HSOFC_FLENC_Msk (_U_(0xF) << USB_HOST_HSOFC_FLENC_Pos)
267 #define USB_HOST_HSOFC_FLENC(value) (USB_HOST_HSOFC_FLENC_Msk & ((value) << USB_HOST_HSOFC_FLENC_Pos))
268 #define USB_HOST_HSOFC_FLENCE_Pos 7
269 #define USB_HOST_HSOFC_FLENCE (_U_(0x1) << USB_HOST_HSOFC_FLENCE_Pos)
270 #define USB_HOST_HSOFC_MASK _U_(0x8F)
272 /* -------- USB_DEVICE_STATUS : (USB Offset: 0x00C) (R/ 8) DEVICE DEVICE Status -------- */
273 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
274 typedef union {
275  struct {
276  uint8_t :2;
277  uint8_t SPEED:2;
278  uint8_t :2;
279  uint8_t LINESTATE:2;
280  } bit;
281  uint8_t reg;
283 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
284 
285 #define USB_DEVICE_STATUS_OFFSET 0x00C
286 #define USB_DEVICE_STATUS_RESETVALUE _U_(0x40)
288 #define USB_DEVICE_STATUS_SPEED_Pos 2
289 #define USB_DEVICE_STATUS_SPEED_Msk (_U_(0x3) << USB_DEVICE_STATUS_SPEED_Pos)
290 #define USB_DEVICE_STATUS_SPEED(value) (USB_DEVICE_STATUS_SPEED_Msk & ((value) << USB_DEVICE_STATUS_SPEED_Pos))
291 #define USB_DEVICE_STATUS_SPEED_FS_Val _U_(0x0)
292 #define USB_DEVICE_STATUS_SPEED_LS_Val _U_(0x1)
293 #define USB_DEVICE_STATUS_SPEED_HS_Val _U_(0x2)
294 #define USB_DEVICE_STATUS_SPEED_FS (USB_DEVICE_STATUS_SPEED_FS_Val << USB_DEVICE_STATUS_SPEED_Pos)
295 #define USB_DEVICE_STATUS_SPEED_LS (USB_DEVICE_STATUS_SPEED_LS_Val << USB_DEVICE_STATUS_SPEED_Pos)
296 #define USB_DEVICE_STATUS_SPEED_HS (USB_DEVICE_STATUS_SPEED_HS_Val << USB_DEVICE_STATUS_SPEED_Pos)
297 #define USB_DEVICE_STATUS_LINESTATE_Pos 6
298 #define USB_DEVICE_STATUS_LINESTATE_Msk (_U_(0x3) << USB_DEVICE_STATUS_LINESTATE_Pos)
299 #define USB_DEVICE_STATUS_LINESTATE(value) (USB_DEVICE_STATUS_LINESTATE_Msk & ((value) << USB_DEVICE_STATUS_LINESTATE_Pos))
300 #define USB_DEVICE_STATUS_LINESTATE_0_Val _U_(0x0)
301 #define USB_DEVICE_STATUS_LINESTATE_1_Val _U_(0x1)
302 #define USB_DEVICE_STATUS_LINESTATE_2_Val _U_(0x2)
303 #define USB_DEVICE_STATUS_LINESTATE_0 (USB_DEVICE_STATUS_LINESTATE_0_Val << USB_DEVICE_STATUS_LINESTATE_Pos)
304 #define USB_DEVICE_STATUS_LINESTATE_1 (USB_DEVICE_STATUS_LINESTATE_1_Val << USB_DEVICE_STATUS_LINESTATE_Pos)
305 #define USB_DEVICE_STATUS_LINESTATE_2 (USB_DEVICE_STATUS_LINESTATE_2_Val << USB_DEVICE_STATUS_LINESTATE_Pos)
306 #define USB_DEVICE_STATUS_MASK _U_(0xCC)
308 /* -------- USB_HOST_STATUS : (USB Offset: 0x00C) (R/W 8) HOST HOST Status -------- */
309 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
310 typedef union {
311  struct {
312  uint8_t :2;
313  uint8_t SPEED:2;
314  uint8_t :2;
315  uint8_t LINESTATE:2;
316  } bit;
317  uint8_t reg;
319 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
320 
321 #define USB_HOST_STATUS_OFFSET 0x00C
322 #define USB_HOST_STATUS_RESETVALUE _U_(0x00)
324 #define USB_HOST_STATUS_SPEED_Pos 2
325 #define USB_HOST_STATUS_SPEED_Msk (_U_(0x3) << USB_HOST_STATUS_SPEED_Pos)
326 #define USB_HOST_STATUS_SPEED(value) (USB_HOST_STATUS_SPEED_Msk & ((value) << USB_HOST_STATUS_SPEED_Pos))
327 #define USB_HOST_STATUS_LINESTATE_Pos 6
328 #define USB_HOST_STATUS_LINESTATE_Msk (_U_(0x3) << USB_HOST_STATUS_LINESTATE_Pos)
329 #define USB_HOST_STATUS_LINESTATE(value) (USB_HOST_STATUS_LINESTATE_Msk & ((value) << USB_HOST_STATUS_LINESTATE_Pos))
330 #define USB_HOST_STATUS_MASK _U_(0xCC)
332 /* -------- USB_FSMSTATUS : (USB Offset: 0x00D) (R/ 8) Finite State Machine Status -------- */
333 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
334 typedef union {
335  struct {
336  uint8_t FSMSTATE:7;
337  uint8_t :1;
338  } bit;
339  uint8_t reg;
341 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
342 
343 #define USB_FSMSTATUS_OFFSET 0x00D
344 #define USB_FSMSTATUS_RESETVALUE _U_(0x01)
346 #define USB_FSMSTATUS_FSMSTATE_Pos 0
347 #define USB_FSMSTATUS_FSMSTATE_Msk (_U_(0x7F) << USB_FSMSTATUS_FSMSTATE_Pos)
348 #define USB_FSMSTATUS_FSMSTATE(value) (USB_FSMSTATUS_FSMSTATE_Msk & ((value) << USB_FSMSTATUS_FSMSTATE_Pos))
349 #define USB_FSMSTATUS_FSMSTATE_OFF_Val _U_(0x1)
350 #define USB_FSMSTATUS_FSMSTATE_ON_Val _U_(0x2)
351 #define USB_FSMSTATUS_FSMSTATE_SUSPEND_Val _U_(0x4)
352 #define USB_FSMSTATUS_FSMSTATE_SLEEP_Val _U_(0x8)
353 #define USB_FSMSTATUS_FSMSTATE_DNRESUME_Val _U_(0x10)
354 #define USB_FSMSTATUS_FSMSTATE_UPRESUME_Val _U_(0x20)
355 #define USB_FSMSTATUS_FSMSTATE_RESET_Val _U_(0x40)
356 #define USB_FSMSTATUS_FSMSTATE_OFF (USB_FSMSTATUS_FSMSTATE_OFF_Val << USB_FSMSTATUS_FSMSTATE_Pos)
357 #define USB_FSMSTATUS_FSMSTATE_ON (USB_FSMSTATUS_FSMSTATE_ON_Val << USB_FSMSTATUS_FSMSTATE_Pos)
358 #define USB_FSMSTATUS_FSMSTATE_SUSPEND (USB_FSMSTATUS_FSMSTATE_SUSPEND_Val << USB_FSMSTATUS_FSMSTATE_Pos)
359 #define USB_FSMSTATUS_FSMSTATE_SLEEP (USB_FSMSTATUS_FSMSTATE_SLEEP_Val << USB_FSMSTATUS_FSMSTATE_Pos)
360 #define USB_FSMSTATUS_FSMSTATE_DNRESUME (USB_FSMSTATUS_FSMSTATE_DNRESUME_Val << USB_FSMSTATUS_FSMSTATE_Pos)
361 #define USB_FSMSTATUS_FSMSTATE_UPRESUME (USB_FSMSTATUS_FSMSTATE_UPRESUME_Val << USB_FSMSTATUS_FSMSTATE_Pos)
362 #define USB_FSMSTATUS_FSMSTATE_RESET (USB_FSMSTATUS_FSMSTATE_RESET_Val << USB_FSMSTATUS_FSMSTATE_Pos)
363 #define USB_FSMSTATUS_MASK _U_(0x7F)
365 /* -------- USB_DEVICE_FNUM : (USB Offset: 0x010) (R/ 16) DEVICE DEVICE Device Frame Number -------- */
366 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
367 typedef union {
368  struct {
369  uint16_t MFNUM:3;
370  uint16_t FNUM:11;
371  uint16_t :1;
372  uint16_t FNCERR:1;
373  } bit;
374  uint16_t reg;
376 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
377 
378 #define USB_DEVICE_FNUM_OFFSET 0x010
379 #define USB_DEVICE_FNUM_RESETVALUE _U_(0x0000)
381 #define USB_DEVICE_FNUM_MFNUM_Pos 0
382 #define USB_DEVICE_FNUM_MFNUM_Msk (_U_(0x7) << USB_DEVICE_FNUM_MFNUM_Pos)
383 #define USB_DEVICE_FNUM_MFNUM(value) (USB_DEVICE_FNUM_MFNUM_Msk & ((value) << USB_DEVICE_FNUM_MFNUM_Pos))
384 #define USB_DEVICE_FNUM_FNUM_Pos 3
385 #define USB_DEVICE_FNUM_FNUM_Msk (_U_(0x7FF) << USB_DEVICE_FNUM_FNUM_Pos)
386 #define USB_DEVICE_FNUM_FNUM(value) (USB_DEVICE_FNUM_FNUM_Msk & ((value) << USB_DEVICE_FNUM_FNUM_Pos))
387 #define USB_DEVICE_FNUM_FNCERR_Pos 15
388 #define USB_DEVICE_FNUM_FNCERR (_U_(0x1) << USB_DEVICE_FNUM_FNCERR_Pos)
389 #define USB_DEVICE_FNUM_MASK _U_(0xBFFF)
391 /* -------- USB_HOST_FNUM : (USB Offset: 0x010) (R/W 16) HOST HOST Host Frame Number -------- */
392 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
393 typedef union {
394  struct {
395  uint16_t MFNUM:3;
396  uint16_t FNUM:11;
397  uint16_t :2;
398  } bit;
399  uint16_t reg;
401 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
402 
403 #define USB_HOST_FNUM_OFFSET 0x010
404 #define USB_HOST_FNUM_RESETVALUE _U_(0x0000)
406 #define USB_HOST_FNUM_MFNUM_Pos 0
407 #define USB_HOST_FNUM_MFNUM_Msk (_U_(0x7) << USB_HOST_FNUM_MFNUM_Pos)
408 #define USB_HOST_FNUM_MFNUM(value) (USB_HOST_FNUM_MFNUM_Msk & ((value) << USB_HOST_FNUM_MFNUM_Pos))
409 #define USB_HOST_FNUM_FNUM_Pos 3
410 #define USB_HOST_FNUM_FNUM_Msk (_U_(0x7FF) << USB_HOST_FNUM_FNUM_Pos)
411 #define USB_HOST_FNUM_FNUM(value) (USB_HOST_FNUM_FNUM_Msk & ((value) << USB_HOST_FNUM_FNUM_Pos))
412 #define USB_HOST_FNUM_MASK _U_(0x3FFF)
414 /* -------- USB_HOST_FLENHIGH : (USB Offset: 0x012) (R/ 8) HOST HOST Host Frame Length -------- */
415 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
416 typedef union {
417  struct {
418  uint8_t FLENHIGH:8;
419  } bit;
420  uint8_t reg;
422 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
423 
424 #define USB_HOST_FLENHIGH_OFFSET 0x012
425 #define USB_HOST_FLENHIGH_RESETVALUE _U_(0x00)
427 #define USB_HOST_FLENHIGH_FLENHIGH_Pos 0
428 #define USB_HOST_FLENHIGH_FLENHIGH_Msk (_U_(0xFF) << USB_HOST_FLENHIGH_FLENHIGH_Pos)
429 #define USB_HOST_FLENHIGH_FLENHIGH(value) (USB_HOST_FLENHIGH_FLENHIGH_Msk & ((value) << USB_HOST_FLENHIGH_FLENHIGH_Pos))
430 #define USB_HOST_FLENHIGH_MASK _U_(0xFF)
432 /* -------- USB_DEVICE_INTENCLR : (USB Offset: 0x014) (R/W 16) DEVICE DEVICE Device Interrupt Enable Clear -------- */
433 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
434 typedef union {
435  struct {
436  uint16_t SUSPEND:1;
437  uint16_t MSOF:1;
438  uint16_t SOF:1;
439  uint16_t EORST:1;
440  uint16_t WAKEUP:1;
441  uint16_t EORSM:1;
442  uint16_t UPRSM:1;
443  uint16_t RAMACER:1;
444  uint16_t LPMNYET:1;
445  uint16_t LPMSUSP:1;
446  uint16_t :6;
447  } bit;
448  uint16_t reg;
450 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
451 
452 #define USB_DEVICE_INTENCLR_OFFSET 0x014
453 #define USB_DEVICE_INTENCLR_RESETVALUE _U_(0x0000)
455 #define USB_DEVICE_INTENCLR_SUSPEND_Pos 0
456 #define USB_DEVICE_INTENCLR_SUSPEND (_U_(0x1) << USB_DEVICE_INTENCLR_SUSPEND_Pos)
457 #define USB_DEVICE_INTENCLR_MSOF_Pos 1
458 #define USB_DEVICE_INTENCLR_MSOF (_U_(0x1) << USB_DEVICE_INTENCLR_MSOF_Pos)
459 #define USB_DEVICE_INTENCLR_SOF_Pos 2
460 #define USB_DEVICE_INTENCLR_SOF (_U_(0x1) << USB_DEVICE_INTENCLR_SOF_Pos)
461 #define USB_DEVICE_INTENCLR_EORST_Pos 3
462 #define USB_DEVICE_INTENCLR_EORST (_U_(0x1) << USB_DEVICE_INTENCLR_EORST_Pos)
463 #define USB_DEVICE_INTENCLR_WAKEUP_Pos 4
464 #define USB_DEVICE_INTENCLR_WAKEUP (_U_(0x1) << USB_DEVICE_INTENCLR_WAKEUP_Pos)
465 #define USB_DEVICE_INTENCLR_EORSM_Pos 5
466 #define USB_DEVICE_INTENCLR_EORSM (_U_(0x1) << USB_DEVICE_INTENCLR_EORSM_Pos)
467 #define USB_DEVICE_INTENCLR_UPRSM_Pos 6
468 #define USB_DEVICE_INTENCLR_UPRSM (_U_(0x1) << USB_DEVICE_INTENCLR_UPRSM_Pos)
469 #define USB_DEVICE_INTENCLR_RAMACER_Pos 7
470 #define USB_DEVICE_INTENCLR_RAMACER (_U_(0x1) << USB_DEVICE_INTENCLR_RAMACER_Pos)
471 #define USB_DEVICE_INTENCLR_LPMNYET_Pos 8
472 #define USB_DEVICE_INTENCLR_LPMNYET (_U_(0x1) << USB_DEVICE_INTENCLR_LPMNYET_Pos)
473 #define USB_DEVICE_INTENCLR_LPMSUSP_Pos 9
474 #define USB_DEVICE_INTENCLR_LPMSUSP (_U_(0x1) << USB_DEVICE_INTENCLR_LPMSUSP_Pos)
475 #define USB_DEVICE_INTENCLR_MASK _U_(0x03FF)
477 /* -------- USB_HOST_INTENCLR : (USB Offset: 0x014) (R/W 16) HOST HOST Host Interrupt Enable Clear -------- */
478 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
479 typedef union {
480  struct {
481  uint16_t :2;
482  uint16_t HSOF:1;
483  uint16_t RST:1;
484  uint16_t WAKEUP:1;
485  uint16_t DNRSM:1;
486  uint16_t UPRSM:1;
487  uint16_t RAMACER:1;
488  uint16_t DCONN:1;
489  uint16_t DDISC:1;
490  uint16_t :6;
491  } bit;
492  uint16_t reg;
494 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
495 
496 #define USB_HOST_INTENCLR_OFFSET 0x014
497 #define USB_HOST_INTENCLR_RESETVALUE _U_(0x0000)
499 #define USB_HOST_INTENCLR_HSOF_Pos 2
500 #define USB_HOST_INTENCLR_HSOF (_U_(0x1) << USB_HOST_INTENCLR_HSOF_Pos)
501 #define USB_HOST_INTENCLR_RST_Pos 3
502 #define USB_HOST_INTENCLR_RST (_U_(0x1) << USB_HOST_INTENCLR_RST_Pos)
503 #define USB_HOST_INTENCLR_WAKEUP_Pos 4
504 #define USB_HOST_INTENCLR_WAKEUP (_U_(0x1) << USB_HOST_INTENCLR_WAKEUP_Pos)
505 #define USB_HOST_INTENCLR_DNRSM_Pos 5
506 #define USB_HOST_INTENCLR_DNRSM (_U_(0x1) << USB_HOST_INTENCLR_DNRSM_Pos)
507 #define USB_HOST_INTENCLR_UPRSM_Pos 6
508 #define USB_HOST_INTENCLR_UPRSM (_U_(0x1) << USB_HOST_INTENCLR_UPRSM_Pos)
509 #define USB_HOST_INTENCLR_RAMACER_Pos 7
510 #define USB_HOST_INTENCLR_RAMACER (_U_(0x1) << USB_HOST_INTENCLR_RAMACER_Pos)
511 #define USB_HOST_INTENCLR_DCONN_Pos 8
512 #define USB_HOST_INTENCLR_DCONN (_U_(0x1) << USB_HOST_INTENCLR_DCONN_Pos)
513 #define USB_HOST_INTENCLR_DDISC_Pos 9
514 #define USB_HOST_INTENCLR_DDISC (_U_(0x1) << USB_HOST_INTENCLR_DDISC_Pos)
515 #define USB_HOST_INTENCLR_MASK _U_(0x03FC)
517 /* -------- USB_DEVICE_INTENSET : (USB Offset: 0x018) (R/W 16) DEVICE DEVICE Device Interrupt Enable Set -------- */
518 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
519 typedef union {
520  struct {
521  uint16_t SUSPEND:1;
522  uint16_t MSOF:1;
523  uint16_t SOF:1;
524  uint16_t EORST:1;
525  uint16_t WAKEUP:1;
526  uint16_t EORSM:1;
527  uint16_t UPRSM:1;
528  uint16_t RAMACER:1;
529  uint16_t LPMNYET:1;
530  uint16_t LPMSUSP:1;
531  uint16_t :6;
532  } bit;
533  uint16_t reg;
535 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
536 
537 #define USB_DEVICE_INTENSET_OFFSET 0x018
538 #define USB_DEVICE_INTENSET_RESETVALUE _U_(0x0000)
540 #define USB_DEVICE_INTENSET_SUSPEND_Pos 0
541 #define USB_DEVICE_INTENSET_SUSPEND (_U_(0x1) << USB_DEVICE_INTENSET_SUSPEND_Pos)
542 #define USB_DEVICE_INTENSET_MSOF_Pos 1
543 #define USB_DEVICE_INTENSET_MSOF (_U_(0x1) << USB_DEVICE_INTENSET_MSOF_Pos)
544 #define USB_DEVICE_INTENSET_SOF_Pos 2
545 #define USB_DEVICE_INTENSET_SOF (_U_(0x1) << USB_DEVICE_INTENSET_SOF_Pos)
546 #define USB_DEVICE_INTENSET_EORST_Pos 3
547 #define USB_DEVICE_INTENSET_EORST (_U_(0x1) << USB_DEVICE_INTENSET_EORST_Pos)
548 #define USB_DEVICE_INTENSET_WAKEUP_Pos 4
549 #define USB_DEVICE_INTENSET_WAKEUP (_U_(0x1) << USB_DEVICE_INTENSET_WAKEUP_Pos)
550 #define USB_DEVICE_INTENSET_EORSM_Pos 5
551 #define USB_DEVICE_INTENSET_EORSM (_U_(0x1) << USB_DEVICE_INTENSET_EORSM_Pos)
552 #define USB_DEVICE_INTENSET_UPRSM_Pos 6
553 #define USB_DEVICE_INTENSET_UPRSM (_U_(0x1) << USB_DEVICE_INTENSET_UPRSM_Pos)
554 #define USB_DEVICE_INTENSET_RAMACER_Pos 7
555 #define USB_DEVICE_INTENSET_RAMACER (_U_(0x1) << USB_DEVICE_INTENSET_RAMACER_Pos)
556 #define USB_DEVICE_INTENSET_LPMNYET_Pos 8
557 #define USB_DEVICE_INTENSET_LPMNYET (_U_(0x1) << USB_DEVICE_INTENSET_LPMNYET_Pos)
558 #define USB_DEVICE_INTENSET_LPMSUSP_Pos 9
559 #define USB_DEVICE_INTENSET_LPMSUSP (_U_(0x1) << USB_DEVICE_INTENSET_LPMSUSP_Pos)
560 #define USB_DEVICE_INTENSET_MASK _U_(0x03FF)
562 /* -------- USB_HOST_INTENSET : (USB Offset: 0x018) (R/W 16) HOST HOST Host Interrupt Enable Set -------- */
563 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
564 typedef union {
565  struct {
566  uint16_t :2;
567  uint16_t HSOF:1;
568  uint16_t RST:1;
569  uint16_t WAKEUP:1;
570  uint16_t DNRSM:1;
571  uint16_t UPRSM:1;
572  uint16_t RAMACER:1;
573  uint16_t DCONN:1;
574  uint16_t DDISC:1;
575  uint16_t :6;
576  } bit;
577  uint16_t reg;
579 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
580 
581 #define USB_HOST_INTENSET_OFFSET 0x018
582 #define USB_HOST_INTENSET_RESETVALUE _U_(0x0000)
584 #define USB_HOST_INTENSET_HSOF_Pos 2
585 #define USB_HOST_INTENSET_HSOF (_U_(0x1) << USB_HOST_INTENSET_HSOF_Pos)
586 #define USB_HOST_INTENSET_RST_Pos 3
587 #define USB_HOST_INTENSET_RST (_U_(0x1) << USB_HOST_INTENSET_RST_Pos)
588 #define USB_HOST_INTENSET_WAKEUP_Pos 4
589 #define USB_HOST_INTENSET_WAKEUP (_U_(0x1) << USB_HOST_INTENSET_WAKEUP_Pos)
590 #define USB_HOST_INTENSET_DNRSM_Pos 5
591 #define USB_HOST_INTENSET_DNRSM (_U_(0x1) << USB_HOST_INTENSET_DNRSM_Pos)
592 #define USB_HOST_INTENSET_UPRSM_Pos 6
593 #define USB_HOST_INTENSET_UPRSM (_U_(0x1) << USB_HOST_INTENSET_UPRSM_Pos)
594 #define USB_HOST_INTENSET_RAMACER_Pos 7
595 #define USB_HOST_INTENSET_RAMACER (_U_(0x1) << USB_HOST_INTENSET_RAMACER_Pos)
596 #define USB_HOST_INTENSET_DCONN_Pos 8
597 #define USB_HOST_INTENSET_DCONN (_U_(0x1) << USB_HOST_INTENSET_DCONN_Pos)
598 #define USB_HOST_INTENSET_DDISC_Pos 9
599 #define USB_HOST_INTENSET_DDISC (_U_(0x1) << USB_HOST_INTENSET_DDISC_Pos)
600 #define USB_HOST_INTENSET_MASK _U_(0x03FC)
602 /* -------- USB_DEVICE_INTFLAG : (USB Offset: 0x01C) (R/W 16) DEVICE DEVICE Device Interrupt Flag -------- */
603 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
604 typedef union { // __I to avoid read-modify-write on write-to-clear register
605  struct {
606  __I uint16_t SUSPEND:1;
607  __I uint16_t MSOF:1;
608  __I uint16_t SOF:1;
609  __I uint16_t EORST:1;
610  __I uint16_t WAKEUP:1;
611  __I uint16_t EORSM:1;
612  __I uint16_t UPRSM:1;
613  __I uint16_t RAMACER:1;
614  __I uint16_t LPMNYET:1;
615  __I uint16_t LPMSUSP:1;
616  __I uint16_t :6;
617  } bit;
618  uint16_t reg;
620 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
621 
622 #define USB_DEVICE_INTFLAG_OFFSET 0x01C
623 #define USB_DEVICE_INTFLAG_RESETVALUE _U_(0x0000)
625 #define USB_DEVICE_INTFLAG_SUSPEND_Pos 0
626 #define USB_DEVICE_INTFLAG_SUSPEND (_U_(0x1) << USB_DEVICE_INTFLAG_SUSPEND_Pos)
627 #define USB_DEVICE_INTFLAG_MSOF_Pos 1
628 #define USB_DEVICE_INTFLAG_MSOF (_U_(0x1) << USB_DEVICE_INTFLAG_MSOF_Pos)
629 #define USB_DEVICE_INTFLAG_SOF_Pos 2
630 #define USB_DEVICE_INTFLAG_SOF (_U_(0x1) << USB_DEVICE_INTFLAG_SOF_Pos)
631 #define USB_DEVICE_INTFLAG_EORST_Pos 3
632 #define USB_DEVICE_INTFLAG_EORST (_U_(0x1) << USB_DEVICE_INTFLAG_EORST_Pos)
633 #define USB_DEVICE_INTFLAG_WAKEUP_Pos 4
634 #define USB_DEVICE_INTFLAG_WAKEUP (_U_(0x1) << USB_DEVICE_INTFLAG_WAKEUP_Pos)
635 #define USB_DEVICE_INTFLAG_EORSM_Pos 5
636 #define USB_DEVICE_INTFLAG_EORSM (_U_(0x1) << USB_DEVICE_INTFLAG_EORSM_Pos)
637 #define USB_DEVICE_INTFLAG_UPRSM_Pos 6
638 #define USB_DEVICE_INTFLAG_UPRSM (_U_(0x1) << USB_DEVICE_INTFLAG_UPRSM_Pos)
639 #define USB_DEVICE_INTFLAG_RAMACER_Pos 7
640 #define USB_DEVICE_INTFLAG_RAMACER (_U_(0x1) << USB_DEVICE_INTFLAG_RAMACER_Pos)
641 #define USB_DEVICE_INTFLAG_LPMNYET_Pos 8
642 #define USB_DEVICE_INTFLAG_LPMNYET (_U_(0x1) << USB_DEVICE_INTFLAG_LPMNYET_Pos)
643 #define USB_DEVICE_INTFLAG_LPMSUSP_Pos 9
644 #define USB_DEVICE_INTFLAG_LPMSUSP (_U_(0x1) << USB_DEVICE_INTFLAG_LPMSUSP_Pos)
645 #define USB_DEVICE_INTFLAG_MASK _U_(0x03FF)
647 /* -------- USB_HOST_INTFLAG : (USB Offset: 0x01C) (R/W 16) HOST HOST Host Interrupt Flag -------- */
648 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
649 typedef union { // __I to avoid read-modify-write on write-to-clear register
650  struct {
651  __I uint16_t :2;
652  __I uint16_t HSOF:1;
653  __I uint16_t RST:1;
654  __I uint16_t WAKEUP:1;
655  __I uint16_t DNRSM:1;
656  __I uint16_t UPRSM:1;
657  __I uint16_t RAMACER:1;
658  __I uint16_t DCONN:1;
659  __I uint16_t DDISC:1;
660  __I uint16_t :6;
661  } bit;
662  uint16_t reg;
664 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
665 
666 #define USB_HOST_INTFLAG_OFFSET 0x01C
667 #define USB_HOST_INTFLAG_RESETVALUE _U_(0x0000)
669 #define USB_HOST_INTFLAG_HSOF_Pos 2
670 #define USB_HOST_INTFLAG_HSOF (_U_(0x1) << USB_HOST_INTFLAG_HSOF_Pos)
671 #define USB_HOST_INTFLAG_RST_Pos 3
672 #define USB_HOST_INTFLAG_RST (_U_(0x1) << USB_HOST_INTFLAG_RST_Pos)
673 #define USB_HOST_INTFLAG_WAKEUP_Pos 4
674 #define USB_HOST_INTFLAG_WAKEUP (_U_(0x1) << USB_HOST_INTFLAG_WAKEUP_Pos)
675 #define USB_HOST_INTFLAG_DNRSM_Pos 5
676 #define USB_HOST_INTFLAG_DNRSM (_U_(0x1) << USB_HOST_INTFLAG_DNRSM_Pos)
677 #define USB_HOST_INTFLAG_UPRSM_Pos 6
678 #define USB_HOST_INTFLAG_UPRSM (_U_(0x1) << USB_HOST_INTFLAG_UPRSM_Pos)
679 #define USB_HOST_INTFLAG_RAMACER_Pos 7
680 #define USB_HOST_INTFLAG_RAMACER (_U_(0x1) << USB_HOST_INTFLAG_RAMACER_Pos)
681 #define USB_HOST_INTFLAG_DCONN_Pos 8
682 #define USB_HOST_INTFLAG_DCONN (_U_(0x1) << USB_HOST_INTFLAG_DCONN_Pos)
683 #define USB_HOST_INTFLAG_DDISC_Pos 9
684 #define USB_HOST_INTFLAG_DDISC (_U_(0x1) << USB_HOST_INTFLAG_DDISC_Pos)
685 #define USB_HOST_INTFLAG_MASK _U_(0x03FC)
687 /* -------- USB_DEVICE_EPINTSMRY : (USB Offset: 0x020) (R/ 16) DEVICE DEVICE End Point Interrupt Summary -------- */
688 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
689 typedef union {
690  struct {
691  uint16_t EPINT0:1;
692  uint16_t EPINT1:1;
693  uint16_t EPINT2:1;
694  uint16_t EPINT3:1;
695  uint16_t EPINT4:1;
696  uint16_t EPINT5:1;
697  uint16_t EPINT6:1;
698  uint16_t EPINT7:1;
699  uint16_t :8;
700  } bit;
701  struct {
702  uint16_t EPINT:8;
703  uint16_t :8;
704  } vec;
705  uint16_t reg;
707 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
708 
709 #define USB_DEVICE_EPINTSMRY_OFFSET 0x020
710 #define USB_DEVICE_EPINTSMRY_RESETVALUE _U_(0x0000)
712 #define USB_DEVICE_EPINTSMRY_EPINT0_Pos 0
713 #define USB_DEVICE_EPINTSMRY_EPINT0 (_U_(1) << USB_DEVICE_EPINTSMRY_EPINT0_Pos)
714 #define USB_DEVICE_EPINTSMRY_EPINT1_Pos 1
715 #define USB_DEVICE_EPINTSMRY_EPINT1 (_U_(1) << USB_DEVICE_EPINTSMRY_EPINT1_Pos)
716 #define USB_DEVICE_EPINTSMRY_EPINT2_Pos 2
717 #define USB_DEVICE_EPINTSMRY_EPINT2 (_U_(1) << USB_DEVICE_EPINTSMRY_EPINT2_Pos)
718 #define USB_DEVICE_EPINTSMRY_EPINT3_Pos 3
719 #define USB_DEVICE_EPINTSMRY_EPINT3 (_U_(1) << USB_DEVICE_EPINTSMRY_EPINT3_Pos)
720 #define USB_DEVICE_EPINTSMRY_EPINT4_Pos 4
721 #define USB_DEVICE_EPINTSMRY_EPINT4 (_U_(1) << USB_DEVICE_EPINTSMRY_EPINT4_Pos)
722 #define USB_DEVICE_EPINTSMRY_EPINT5_Pos 5
723 #define USB_DEVICE_EPINTSMRY_EPINT5 (_U_(1) << USB_DEVICE_EPINTSMRY_EPINT5_Pos)
724 #define USB_DEVICE_EPINTSMRY_EPINT6_Pos 6
725 #define USB_DEVICE_EPINTSMRY_EPINT6 (_U_(1) << USB_DEVICE_EPINTSMRY_EPINT6_Pos)
726 #define USB_DEVICE_EPINTSMRY_EPINT7_Pos 7
727 #define USB_DEVICE_EPINTSMRY_EPINT7 (_U_(1) << USB_DEVICE_EPINTSMRY_EPINT7_Pos)
728 #define USB_DEVICE_EPINTSMRY_EPINT_Pos 0
729 #define USB_DEVICE_EPINTSMRY_EPINT_Msk (_U_(0xFF) << USB_DEVICE_EPINTSMRY_EPINT_Pos)
730 #define USB_DEVICE_EPINTSMRY_EPINT(value) (USB_DEVICE_EPINTSMRY_EPINT_Msk & ((value) << USB_DEVICE_EPINTSMRY_EPINT_Pos))
731 #define USB_DEVICE_EPINTSMRY_MASK _U_(0x00FF)
733 /* -------- USB_HOST_PINTSMRY : (USB Offset: 0x020) (R/ 16) HOST HOST Pipe Interrupt Summary -------- */
734 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
735 typedef union {
736  struct {
737  uint16_t EPINT0:1;
738  uint16_t EPINT1:1;
739  uint16_t EPINT2:1;
740  uint16_t EPINT3:1;
741  uint16_t EPINT4:1;
742  uint16_t EPINT5:1;
743  uint16_t EPINT6:1;
744  uint16_t EPINT7:1;
745  uint16_t :8;
746  } bit;
747  struct {
748  uint16_t EPINT:8;
749  uint16_t :8;
750  } vec;
751  uint16_t reg;
753 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
754 
755 #define USB_HOST_PINTSMRY_OFFSET 0x020
756 #define USB_HOST_PINTSMRY_RESETVALUE _U_(0x0000)
758 #define USB_HOST_PINTSMRY_EPINT0_Pos 0
759 #define USB_HOST_PINTSMRY_EPINT0 (_U_(1) << USB_HOST_PINTSMRY_EPINT0_Pos)
760 #define USB_HOST_PINTSMRY_EPINT1_Pos 1
761 #define USB_HOST_PINTSMRY_EPINT1 (_U_(1) << USB_HOST_PINTSMRY_EPINT1_Pos)
762 #define USB_HOST_PINTSMRY_EPINT2_Pos 2
763 #define USB_HOST_PINTSMRY_EPINT2 (_U_(1) << USB_HOST_PINTSMRY_EPINT2_Pos)
764 #define USB_HOST_PINTSMRY_EPINT3_Pos 3
765 #define USB_HOST_PINTSMRY_EPINT3 (_U_(1) << USB_HOST_PINTSMRY_EPINT3_Pos)
766 #define USB_HOST_PINTSMRY_EPINT4_Pos 4
767 #define USB_HOST_PINTSMRY_EPINT4 (_U_(1) << USB_HOST_PINTSMRY_EPINT4_Pos)
768 #define USB_HOST_PINTSMRY_EPINT5_Pos 5
769 #define USB_HOST_PINTSMRY_EPINT5 (_U_(1) << USB_HOST_PINTSMRY_EPINT5_Pos)
770 #define USB_HOST_PINTSMRY_EPINT6_Pos 6
771 #define USB_HOST_PINTSMRY_EPINT6 (_U_(1) << USB_HOST_PINTSMRY_EPINT6_Pos)
772 #define USB_HOST_PINTSMRY_EPINT7_Pos 7
773 #define USB_HOST_PINTSMRY_EPINT7 (_U_(1) << USB_HOST_PINTSMRY_EPINT7_Pos)
774 #define USB_HOST_PINTSMRY_EPINT_Pos 0
775 #define USB_HOST_PINTSMRY_EPINT_Msk (_U_(0xFF) << USB_HOST_PINTSMRY_EPINT_Pos)
776 #define USB_HOST_PINTSMRY_EPINT(value) (USB_HOST_PINTSMRY_EPINT_Msk & ((value) << USB_HOST_PINTSMRY_EPINT_Pos))
777 #define USB_HOST_PINTSMRY_MASK _U_(0x00FF)
779 /* -------- USB_DESCADD : (USB Offset: 0x024) (R/W 32) Descriptor Address -------- */
780 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
781 typedef union {
782  struct {
783  uint32_t DESCADD:32;
784  } bit;
785  uint32_t reg;
787 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
788 
789 #define USB_DESCADD_OFFSET 0x024
790 #define USB_DESCADD_RESETVALUE _U_(0x00000000)
792 #define USB_DESCADD_DESCADD_Pos 0
793 #define USB_DESCADD_DESCADD_Msk (_U_(0xFFFFFFFF) << USB_DESCADD_DESCADD_Pos)
794 #define USB_DESCADD_DESCADD(value) (USB_DESCADD_DESCADD_Msk & ((value) << USB_DESCADD_DESCADD_Pos))
795 #define USB_DESCADD_MASK _U_(0xFFFFFFFF)
797 /* -------- USB_PADCAL : (USB Offset: 0x028) (R/W 16) USB PAD Calibration -------- */
798 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
799 typedef union {
800  struct {
801  uint16_t TRANSP:5;
802  uint16_t :1;
803  uint16_t TRANSN:5;
804  uint16_t :1;
805  uint16_t TRIM:3;
806  uint16_t :1;
807  } bit;
808  uint16_t reg;
810 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
811 
812 #define USB_PADCAL_OFFSET 0x028
813 #define USB_PADCAL_RESETVALUE _U_(0x0000)
815 #define USB_PADCAL_TRANSP_Pos 0
816 #define USB_PADCAL_TRANSP_Msk (_U_(0x1F) << USB_PADCAL_TRANSP_Pos)
817 #define USB_PADCAL_TRANSP(value) (USB_PADCAL_TRANSP_Msk & ((value) << USB_PADCAL_TRANSP_Pos))
818 #define USB_PADCAL_TRANSN_Pos 6
819 #define USB_PADCAL_TRANSN_Msk (_U_(0x1F) << USB_PADCAL_TRANSN_Pos)
820 #define USB_PADCAL_TRANSN(value) (USB_PADCAL_TRANSN_Msk & ((value) << USB_PADCAL_TRANSN_Pos))
821 #define USB_PADCAL_TRIM_Pos 12
822 #define USB_PADCAL_TRIM_Msk (_U_(0x7) << USB_PADCAL_TRIM_Pos)
823 #define USB_PADCAL_TRIM(value) (USB_PADCAL_TRIM_Msk & ((value) << USB_PADCAL_TRIM_Pos))
824 #define USB_PADCAL_MASK _U_(0x77DF)
826 /* -------- USB_DEVICE_EPCFG : (USB Offset: 0x100) (R/W 8) DEVICE DEVICE_ENDPOINT End Point Configuration -------- */
827 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
828 typedef union {
829  struct {
830  uint8_t EPTYPE0:3;
831  uint8_t :1;
832  uint8_t EPTYPE1:3;
833  uint8_t NYETDIS:1;
834  } bit;
835  uint8_t reg;
837 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
838 
839 #define USB_DEVICE_EPCFG_OFFSET 0x100
840 #define USB_DEVICE_EPCFG_RESETVALUE _U_(0x00)
842 #define USB_DEVICE_EPCFG_EPTYPE0_Pos 0
843 #define USB_DEVICE_EPCFG_EPTYPE0_Msk (_U_(0x7) << USB_DEVICE_EPCFG_EPTYPE0_Pos)
844 #define USB_DEVICE_EPCFG_EPTYPE0(value) (USB_DEVICE_EPCFG_EPTYPE0_Msk & ((value) << USB_DEVICE_EPCFG_EPTYPE0_Pos))
845 #define USB_DEVICE_EPCFG_EPTYPE1_Pos 4
846 #define USB_DEVICE_EPCFG_EPTYPE1_Msk (_U_(0x7) << USB_DEVICE_EPCFG_EPTYPE1_Pos)
847 #define USB_DEVICE_EPCFG_EPTYPE1(value) (USB_DEVICE_EPCFG_EPTYPE1_Msk & ((value) << USB_DEVICE_EPCFG_EPTYPE1_Pos))
848 #define USB_DEVICE_EPCFG_NYETDIS_Pos 7
849 #define USB_DEVICE_EPCFG_NYETDIS (_U_(0x1) << USB_DEVICE_EPCFG_NYETDIS_Pos)
850 #define USB_DEVICE_EPCFG_MASK _U_(0xF7)
852 /* -------- USB_HOST_PCFG : (USB Offset: 0x100) (R/W 8) HOST HOST_PIPE End Point Configuration -------- */
853 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
854 typedef union {
855  struct {
856  uint8_t PTOKEN:2;
857  uint8_t BK:1;
858  uint8_t PTYPE:3;
859  uint8_t :2;
860  } bit;
861  uint8_t reg;
863 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
864 
865 #define USB_HOST_PCFG_OFFSET 0x100
866 #define USB_HOST_PCFG_RESETVALUE _U_(0x00)
868 #define USB_HOST_PCFG_PTOKEN_Pos 0
869 #define USB_HOST_PCFG_PTOKEN_Msk (_U_(0x3) << USB_HOST_PCFG_PTOKEN_Pos)
870 #define USB_HOST_PCFG_PTOKEN(value) (USB_HOST_PCFG_PTOKEN_Msk & ((value) << USB_HOST_PCFG_PTOKEN_Pos))
871 #define USB_HOST_PCFG_BK_Pos 2
872 #define USB_HOST_PCFG_BK (_U_(0x1) << USB_HOST_PCFG_BK_Pos)
873 #define USB_HOST_PCFG_PTYPE_Pos 3
874 #define USB_HOST_PCFG_PTYPE_Msk (_U_(0x7) << USB_HOST_PCFG_PTYPE_Pos)
875 #define USB_HOST_PCFG_PTYPE(value) (USB_HOST_PCFG_PTYPE_Msk & ((value) << USB_HOST_PCFG_PTYPE_Pos))
876 #define USB_HOST_PCFG_MASK _U_(0x3F)
878 /* -------- USB_HOST_BINTERVAL : (USB Offset: 0x103) (R/W 8) HOST HOST_PIPE Bus Access Period of Pipe -------- */
879 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
880 typedef union {
881  struct {
882  uint8_t BITINTERVAL:8;
883  } bit;
884  uint8_t reg;
886 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
887 
888 #define USB_HOST_BINTERVAL_OFFSET 0x103
889 #define USB_HOST_BINTERVAL_RESETVALUE _U_(0x00)
891 #define USB_HOST_BINTERVAL_BITINTERVAL_Pos 0
892 #define USB_HOST_BINTERVAL_BITINTERVAL_Msk (_U_(0xFF) << USB_HOST_BINTERVAL_BITINTERVAL_Pos)
893 #define USB_HOST_BINTERVAL_BITINTERVAL(value) (USB_HOST_BINTERVAL_BITINTERVAL_Msk & ((value) << USB_HOST_BINTERVAL_BITINTERVAL_Pos))
894 #define USB_HOST_BINTERVAL_MASK _U_(0xFF)
896 /* -------- USB_DEVICE_EPSTATUSCLR : (USB Offset: 0x104) ( /W 8) DEVICE DEVICE_ENDPOINT End Point Pipe Status Clear -------- */
897 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
898 typedef union {
899  struct {
900  uint8_t DTGLOUT:1;
901  uint8_t DTGLIN:1;
902  uint8_t CURBK:1;
903  uint8_t :1;
904  uint8_t STALLRQ0:1;
905  uint8_t STALLRQ1:1;
906  uint8_t BK0RDY:1;
907  uint8_t BK1RDY:1;
908  } bit;
909  struct {
910  uint8_t :4;
911  uint8_t STALLRQ:2;
912  uint8_t :2;
913  } vec;
914  uint8_t reg;
916 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
917 
918 #define USB_DEVICE_EPSTATUSCLR_OFFSET 0x104
919 #define USB_DEVICE_EPSTATUSCLR_RESETVALUE _U_(0x00)
921 #define USB_DEVICE_EPSTATUSCLR_DTGLOUT_Pos 0
922 #define USB_DEVICE_EPSTATUSCLR_DTGLOUT (_U_(0x1) << USB_DEVICE_EPSTATUSCLR_DTGLOUT_Pos)
923 #define USB_DEVICE_EPSTATUSCLR_DTGLIN_Pos 1
924 #define USB_DEVICE_EPSTATUSCLR_DTGLIN (_U_(0x1) << USB_DEVICE_EPSTATUSCLR_DTGLIN_Pos)
925 #define USB_DEVICE_EPSTATUSCLR_CURBK_Pos 2
926 #define USB_DEVICE_EPSTATUSCLR_CURBK (_U_(0x1) << USB_DEVICE_EPSTATUSCLR_CURBK_Pos)
927 #define USB_DEVICE_EPSTATUSCLR_STALLRQ0_Pos 4
928 #define USB_DEVICE_EPSTATUSCLR_STALLRQ0 (_U_(1) << USB_DEVICE_EPSTATUSCLR_STALLRQ0_Pos)
929 #define USB_DEVICE_EPSTATUSCLR_STALLRQ1_Pos 5
930 #define USB_DEVICE_EPSTATUSCLR_STALLRQ1 (_U_(1) << USB_DEVICE_EPSTATUSCLR_STALLRQ1_Pos)
931 #define USB_DEVICE_EPSTATUSCLR_STALLRQ_Pos 4
932 #define USB_DEVICE_EPSTATUSCLR_STALLRQ_Msk (_U_(0x3) << USB_DEVICE_EPSTATUSCLR_STALLRQ_Pos)
933 #define USB_DEVICE_EPSTATUSCLR_STALLRQ(value) (USB_DEVICE_EPSTATUSCLR_STALLRQ_Msk & ((value) << USB_DEVICE_EPSTATUSCLR_STALLRQ_Pos))
934 #define USB_DEVICE_EPSTATUSCLR_BK0RDY_Pos 6
935 #define USB_DEVICE_EPSTATUSCLR_BK0RDY (_U_(0x1) << USB_DEVICE_EPSTATUSCLR_BK0RDY_Pos)
936 #define USB_DEVICE_EPSTATUSCLR_BK1RDY_Pos 7
937 #define USB_DEVICE_EPSTATUSCLR_BK1RDY (_U_(0x1) << USB_DEVICE_EPSTATUSCLR_BK1RDY_Pos)
938 #define USB_DEVICE_EPSTATUSCLR_MASK _U_(0xF7)
940 /* -------- USB_HOST_PSTATUSCLR : (USB Offset: 0x104) ( /W 8) HOST HOST_PIPE End Point Pipe Status Clear -------- */
941 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
942 typedef union {
943  struct {
944  uint8_t DTGL:1;
945  uint8_t :1;
946  uint8_t CURBK:1;
947  uint8_t :1;
948  uint8_t PFREEZE:1;
949  uint8_t :1;
950  uint8_t BK0RDY:1;
951  uint8_t BK1RDY:1;
952  } bit;
953  uint8_t reg;
955 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
956 
957 #define USB_HOST_PSTATUSCLR_OFFSET 0x104
958 #define USB_HOST_PSTATUSCLR_RESETVALUE _U_(0x00)
960 #define USB_HOST_PSTATUSCLR_DTGL_Pos 0
961 #define USB_HOST_PSTATUSCLR_DTGL (_U_(0x1) << USB_HOST_PSTATUSCLR_DTGL_Pos)
962 #define USB_HOST_PSTATUSCLR_CURBK_Pos 2
963 #define USB_HOST_PSTATUSCLR_CURBK (_U_(0x1) << USB_HOST_PSTATUSCLR_CURBK_Pos)
964 #define USB_HOST_PSTATUSCLR_PFREEZE_Pos 4
965 #define USB_HOST_PSTATUSCLR_PFREEZE (_U_(0x1) << USB_HOST_PSTATUSCLR_PFREEZE_Pos)
966 #define USB_HOST_PSTATUSCLR_BK0RDY_Pos 6
967 #define USB_HOST_PSTATUSCLR_BK0RDY (_U_(0x1) << USB_HOST_PSTATUSCLR_BK0RDY_Pos)
968 #define USB_HOST_PSTATUSCLR_BK1RDY_Pos 7
969 #define USB_HOST_PSTATUSCLR_BK1RDY (_U_(0x1) << USB_HOST_PSTATUSCLR_BK1RDY_Pos)
970 #define USB_HOST_PSTATUSCLR_MASK _U_(0xD5)
972 /* -------- USB_DEVICE_EPSTATUSSET : (USB Offset: 0x105) ( /W 8) DEVICE DEVICE_ENDPOINT End Point Pipe Status Set -------- */
973 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
974 typedef union {
975  struct {
976  uint8_t DTGLOUT:1;
977  uint8_t DTGLIN:1;
978  uint8_t CURBK:1;
979  uint8_t :1;
980  uint8_t STALLRQ0:1;
981  uint8_t STALLRQ1:1;
982  uint8_t BK0RDY:1;
983  uint8_t BK1RDY:1;
984  } bit;
985  struct {
986  uint8_t :4;
987  uint8_t STALLRQ:2;
988  uint8_t :2;
989  } vec;
990  uint8_t reg;
992 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
993 
994 #define USB_DEVICE_EPSTATUSSET_OFFSET 0x105
995 #define USB_DEVICE_EPSTATUSSET_RESETVALUE _U_(0x00)
997 #define USB_DEVICE_EPSTATUSSET_DTGLOUT_Pos 0
998 #define USB_DEVICE_EPSTATUSSET_DTGLOUT (_U_(0x1) << USB_DEVICE_EPSTATUSSET_DTGLOUT_Pos)
999 #define USB_DEVICE_EPSTATUSSET_DTGLIN_Pos 1
1000 #define USB_DEVICE_EPSTATUSSET_DTGLIN (_U_(0x1) << USB_DEVICE_EPSTATUSSET_DTGLIN_Pos)
1001 #define USB_DEVICE_EPSTATUSSET_CURBK_Pos 2
1002 #define USB_DEVICE_EPSTATUSSET_CURBK (_U_(0x1) << USB_DEVICE_EPSTATUSSET_CURBK_Pos)
1003 #define USB_DEVICE_EPSTATUSSET_STALLRQ0_Pos 4
1004 #define USB_DEVICE_EPSTATUSSET_STALLRQ0 (_U_(1) << USB_DEVICE_EPSTATUSSET_STALLRQ0_Pos)
1005 #define USB_DEVICE_EPSTATUSSET_STALLRQ1_Pos 5
1006 #define USB_DEVICE_EPSTATUSSET_STALLRQ1 (_U_(1) << USB_DEVICE_EPSTATUSSET_STALLRQ1_Pos)
1007 #define USB_DEVICE_EPSTATUSSET_STALLRQ_Pos 4
1008 #define USB_DEVICE_EPSTATUSSET_STALLRQ_Msk (_U_(0x3) << USB_DEVICE_EPSTATUSSET_STALLRQ_Pos)
1009 #define USB_DEVICE_EPSTATUSSET_STALLRQ(value) (USB_DEVICE_EPSTATUSSET_STALLRQ_Msk & ((value) << USB_DEVICE_EPSTATUSSET_STALLRQ_Pos))
1010 #define USB_DEVICE_EPSTATUSSET_BK0RDY_Pos 6
1011 #define USB_DEVICE_EPSTATUSSET_BK0RDY (_U_(0x1) << USB_DEVICE_EPSTATUSSET_BK0RDY_Pos)
1012 #define USB_DEVICE_EPSTATUSSET_BK1RDY_Pos 7
1013 #define USB_DEVICE_EPSTATUSSET_BK1RDY (_U_(0x1) << USB_DEVICE_EPSTATUSSET_BK1RDY_Pos)
1014 #define USB_DEVICE_EPSTATUSSET_MASK _U_(0xF7)
1016 /* -------- USB_HOST_PSTATUSSET : (USB Offset: 0x105) ( /W 8) HOST HOST_PIPE End Point Pipe Status Set -------- */
1017 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1018 typedef union {
1019  struct {
1020  uint8_t DTGL:1;
1021  uint8_t :1;
1022  uint8_t CURBK:1;
1023  uint8_t :1;
1024  uint8_t PFREEZE:1;
1025  uint8_t :1;
1026  uint8_t BK0RDY:1;
1027  uint8_t BK1RDY:1;
1028  } bit;
1029  uint8_t reg;
1031 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1032 
1033 #define USB_HOST_PSTATUSSET_OFFSET 0x105
1034 #define USB_HOST_PSTATUSSET_RESETVALUE _U_(0x00)
1036 #define USB_HOST_PSTATUSSET_DTGL_Pos 0
1037 #define USB_HOST_PSTATUSSET_DTGL (_U_(0x1) << USB_HOST_PSTATUSSET_DTGL_Pos)
1038 #define USB_HOST_PSTATUSSET_CURBK_Pos 2
1039 #define USB_HOST_PSTATUSSET_CURBK (_U_(0x1) << USB_HOST_PSTATUSSET_CURBK_Pos)
1040 #define USB_HOST_PSTATUSSET_PFREEZE_Pos 4
1041 #define USB_HOST_PSTATUSSET_PFREEZE (_U_(0x1) << USB_HOST_PSTATUSSET_PFREEZE_Pos)
1042 #define USB_HOST_PSTATUSSET_BK0RDY_Pos 6
1043 #define USB_HOST_PSTATUSSET_BK0RDY (_U_(0x1) << USB_HOST_PSTATUSSET_BK0RDY_Pos)
1044 #define USB_HOST_PSTATUSSET_BK1RDY_Pos 7
1045 #define USB_HOST_PSTATUSSET_BK1RDY (_U_(0x1) << USB_HOST_PSTATUSSET_BK1RDY_Pos)
1046 #define USB_HOST_PSTATUSSET_MASK _U_(0xD5)
1048 /* -------- USB_DEVICE_EPSTATUS : (USB Offset: 0x106) (R/ 8) DEVICE DEVICE_ENDPOINT End Point Pipe Status -------- */
1049 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1050 typedef union {
1051  struct {
1052  uint8_t DTGLOUT:1;
1053  uint8_t DTGLIN:1;
1054  uint8_t CURBK:1;
1055  uint8_t :1;
1056  uint8_t STALLRQ0:1;
1057  uint8_t STALLRQ1:1;
1058  uint8_t BK0RDY:1;
1059  uint8_t BK1RDY:1;
1060  } bit;
1061  struct {
1062  uint8_t :4;
1063  uint8_t STALLRQ:2;
1064  uint8_t :2;
1065  } vec;
1066  uint8_t reg;
1068 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1069 
1070 #define USB_DEVICE_EPSTATUS_OFFSET 0x106
1071 #define USB_DEVICE_EPSTATUS_RESETVALUE _U_(0x00)
1073 #define USB_DEVICE_EPSTATUS_DTGLOUT_Pos 0
1074 #define USB_DEVICE_EPSTATUS_DTGLOUT (_U_(0x1) << USB_DEVICE_EPSTATUS_DTGLOUT_Pos)
1075 #define USB_DEVICE_EPSTATUS_DTGLIN_Pos 1
1076 #define USB_DEVICE_EPSTATUS_DTGLIN (_U_(0x1) << USB_DEVICE_EPSTATUS_DTGLIN_Pos)
1077 #define USB_DEVICE_EPSTATUS_CURBK_Pos 2
1078 #define USB_DEVICE_EPSTATUS_CURBK (_U_(0x1) << USB_DEVICE_EPSTATUS_CURBK_Pos)
1079 #define USB_DEVICE_EPSTATUS_STALLRQ0_Pos 4
1080 #define USB_DEVICE_EPSTATUS_STALLRQ0 (_U_(1) << USB_DEVICE_EPSTATUS_STALLRQ0_Pos)
1081 #define USB_DEVICE_EPSTATUS_STALLRQ1_Pos 5
1082 #define USB_DEVICE_EPSTATUS_STALLRQ1 (_U_(1) << USB_DEVICE_EPSTATUS_STALLRQ1_Pos)
1083 #define USB_DEVICE_EPSTATUS_STALLRQ_Pos 4
1084 #define USB_DEVICE_EPSTATUS_STALLRQ_Msk (_U_(0x3) << USB_DEVICE_EPSTATUS_STALLRQ_Pos)
1085 #define USB_DEVICE_EPSTATUS_STALLRQ(value) (USB_DEVICE_EPSTATUS_STALLRQ_Msk & ((value) << USB_DEVICE_EPSTATUS_STALLRQ_Pos))
1086 #define USB_DEVICE_EPSTATUS_BK0RDY_Pos 6
1087 #define USB_DEVICE_EPSTATUS_BK0RDY (_U_(0x1) << USB_DEVICE_EPSTATUS_BK0RDY_Pos)
1088 #define USB_DEVICE_EPSTATUS_BK1RDY_Pos 7
1089 #define USB_DEVICE_EPSTATUS_BK1RDY (_U_(0x1) << USB_DEVICE_EPSTATUS_BK1RDY_Pos)
1090 #define USB_DEVICE_EPSTATUS_MASK _U_(0xF7)
1092 /* -------- USB_HOST_PSTATUS : (USB Offset: 0x106) (R/ 8) HOST HOST_PIPE End Point Pipe Status -------- */
1093 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1094 typedef union {
1095  struct {
1096  uint8_t DTGL:1;
1097  uint8_t :1;
1098  uint8_t CURBK:1;
1099  uint8_t :1;
1100  uint8_t PFREEZE:1;
1101  uint8_t :1;
1102  uint8_t BK0RDY:1;
1103  uint8_t BK1RDY:1;
1104  } bit;
1105  uint8_t reg;
1107 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1108 
1109 #define USB_HOST_PSTATUS_OFFSET 0x106
1110 #define USB_HOST_PSTATUS_RESETVALUE _U_(0x00)
1112 #define USB_HOST_PSTATUS_DTGL_Pos 0
1113 #define USB_HOST_PSTATUS_DTGL (_U_(0x1) << USB_HOST_PSTATUS_DTGL_Pos)
1114 #define USB_HOST_PSTATUS_CURBK_Pos 2
1115 #define USB_HOST_PSTATUS_CURBK (_U_(0x1) << USB_HOST_PSTATUS_CURBK_Pos)
1116 #define USB_HOST_PSTATUS_PFREEZE_Pos 4
1117 #define USB_HOST_PSTATUS_PFREEZE (_U_(0x1) << USB_HOST_PSTATUS_PFREEZE_Pos)
1118 #define USB_HOST_PSTATUS_BK0RDY_Pos 6
1119 #define USB_HOST_PSTATUS_BK0RDY (_U_(0x1) << USB_HOST_PSTATUS_BK0RDY_Pos)
1120 #define USB_HOST_PSTATUS_BK1RDY_Pos 7
1121 #define USB_HOST_PSTATUS_BK1RDY (_U_(0x1) << USB_HOST_PSTATUS_BK1RDY_Pos)
1122 #define USB_HOST_PSTATUS_MASK _U_(0xD5)
1124 /* -------- USB_DEVICE_EPINTFLAG : (USB Offset: 0x107) (R/W 8) DEVICE DEVICE_ENDPOINT End Point Interrupt Flag -------- */
1125 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1126 typedef union { // __I to avoid read-modify-write on write-to-clear register
1127  struct {
1128  __I uint8_t TRCPT0:1;
1129  __I uint8_t TRCPT1:1;
1130  __I uint8_t TRFAIL0:1;
1131  __I uint8_t TRFAIL1:1;
1132  __I uint8_t RXSTP:1;
1133  __I uint8_t STALL0:1;
1134  __I uint8_t STALL1:1;
1135  __I uint8_t :1;
1136  } bit;
1137  struct {
1138  __I uint8_t TRCPT:2;
1139  __I uint8_t TRFAIL:2;
1140  __I uint8_t :1;
1141  __I uint8_t STALL:2;
1142  __I uint8_t :1;
1143  } vec;
1144  uint8_t reg;
1146 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1147 
1148 #define USB_DEVICE_EPINTFLAG_OFFSET 0x107
1149 #define USB_DEVICE_EPINTFLAG_RESETVALUE _U_(0x00)
1151 #define USB_DEVICE_EPINTFLAG_TRCPT0_Pos 0
1152 #define USB_DEVICE_EPINTFLAG_TRCPT0 (_U_(1) << USB_DEVICE_EPINTFLAG_TRCPT0_Pos)
1153 #define USB_DEVICE_EPINTFLAG_TRCPT1_Pos 1
1154 #define USB_DEVICE_EPINTFLAG_TRCPT1 (_U_(1) << USB_DEVICE_EPINTFLAG_TRCPT1_Pos)
1155 #define USB_DEVICE_EPINTFLAG_TRCPT_Pos 0
1156 #define USB_DEVICE_EPINTFLAG_TRCPT_Msk (_U_(0x3) << USB_DEVICE_EPINTFLAG_TRCPT_Pos)
1157 #define USB_DEVICE_EPINTFLAG_TRCPT(value) (USB_DEVICE_EPINTFLAG_TRCPT_Msk & ((value) << USB_DEVICE_EPINTFLAG_TRCPT_Pos))
1158 #define USB_DEVICE_EPINTFLAG_TRFAIL0_Pos 2
1159 #define USB_DEVICE_EPINTFLAG_TRFAIL0 (_U_(1) << USB_DEVICE_EPINTFLAG_TRFAIL0_Pos)
1160 #define USB_DEVICE_EPINTFLAG_TRFAIL1_Pos 3
1161 #define USB_DEVICE_EPINTFLAG_TRFAIL1 (_U_(1) << USB_DEVICE_EPINTFLAG_TRFAIL1_Pos)
1162 #define USB_DEVICE_EPINTFLAG_TRFAIL_Pos 2
1163 #define USB_DEVICE_EPINTFLAG_TRFAIL_Msk (_U_(0x3) << USB_DEVICE_EPINTFLAG_TRFAIL_Pos)
1164 #define USB_DEVICE_EPINTFLAG_TRFAIL(value) (USB_DEVICE_EPINTFLAG_TRFAIL_Msk & ((value) << USB_DEVICE_EPINTFLAG_TRFAIL_Pos))
1165 #define USB_DEVICE_EPINTFLAG_RXSTP_Pos 4
1166 #define USB_DEVICE_EPINTFLAG_RXSTP (_U_(0x1) << USB_DEVICE_EPINTFLAG_RXSTP_Pos)
1167 #define USB_DEVICE_EPINTFLAG_STALL0_Pos 5
1168 #define USB_DEVICE_EPINTFLAG_STALL0 (_U_(1) << USB_DEVICE_EPINTFLAG_STALL0_Pos)
1169 #define USB_DEVICE_EPINTFLAG_STALL1_Pos 6
1170 #define USB_DEVICE_EPINTFLAG_STALL1 (_U_(1) << USB_DEVICE_EPINTFLAG_STALL1_Pos)
1171 #define USB_DEVICE_EPINTFLAG_STALL_Pos 5
1172 #define USB_DEVICE_EPINTFLAG_STALL_Msk (_U_(0x3) << USB_DEVICE_EPINTFLAG_STALL_Pos)
1173 #define USB_DEVICE_EPINTFLAG_STALL(value) (USB_DEVICE_EPINTFLAG_STALL_Msk & ((value) << USB_DEVICE_EPINTFLAG_STALL_Pos))
1174 #define USB_DEVICE_EPINTFLAG_MASK _U_(0x7F)
1176 /* -------- USB_HOST_PINTFLAG : (USB Offset: 0x107) (R/W 8) HOST HOST_PIPE Pipe Interrupt Flag -------- */
1177 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1178 typedef union { // __I to avoid read-modify-write on write-to-clear register
1179  struct {
1180  __I uint8_t TRCPT0:1;
1181  __I uint8_t TRCPT1:1;
1182  __I uint8_t TRFAIL:1;
1183  __I uint8_t PERR:1;
1184  __I uint8_t TXSTP:1;
1185  __I uint8_t STALL:1;
1186  __I uint8_t :2;
1187  } bit;
1188  struct {
1189  __I uint8_t TRCPT:2;
1190  __I uint8_t :6;
1191  } vec;
1192  uint8_t reg;
1194 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1195 
1196 #define USB_HOST_PINTFLAG_OFFSET 0x107
1197 #define USB_HOST_PINTFLAG_RESETVALUE _U_(0x00)
1199 #define USB_HOST_PINTFLAG_TRCPT0_Pos 0
1200 #define USB_HOST_PINTFLAG_TRCPT0 (_U_(1) << USB_HOST_PINTFLAG_TRCPT0_Pos)
1201 #define USB_HOST_PINTFLAG_TRCPT1_Pos 1
1202 #define USB_HOST_PINTFLAG_TRCPT1 (_U_(1) << USB_HOST_PINTFLAG_TRCPT1_Pos)
1203 #define USB_HOST_PINTFLAG_TRCPT_Pos 0
1204 #define USB_HOST_PINTFLAG_TRCPT_Msk (_U_(0x3) << USB_HOST_PINTFLAG_TRCPT_Pos)
1205 #define USB_HOST_PINTFLAG_TRCPT(value) (USB_HOST_PINTFLAG_TRCPT_Msk & ((value) << USB_HOST_PINTFLAG_TRCPT_Pos))
1206 #define USB_HOST_PINTFLAG_TRFAIL_Pos 2
1207 #define USB_HOST_PINTFLAG_TRFAIL (_U_(0x1) << USB_HOST_PINTFLAG_TRFAIL_Pos)
1208 #define USB_HOST_PINTFLAG_PERR_Pos 3
1209 #define USB_HOST_PINTFLAG_PERR (_U_(0x1) << USB_HOST_PINTFLAG_PERR_Pos)
1210 #define USB_HOST_PINTFLAG_TXSTP_Pos 4
1211 #define USB_HOST_PINTFLAG_TXSTP (_U_(0x1) << USB_HOST_PINTFLAG_TXSTP_Pos)
1212 #define USB_HOST_PINTFLAG_STALL_Pos 5
1213 #define USB_HOST_PINTFLAG_STALL (_U_(0x1) << USB_HOST_PINTFLAG_STALL_Pos)
1214 #define USB_HOST_PINTFLAG_MASK _U_(0x3F)
1216 /* -------- USB_DEVICE_EPINTENCLR : (USB Offset: 0x108) (R/W 8) DEVICE DEVICE_ENDPOINT End Point Interrupt Clear Flag -------- */
1217 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1218 typedef union {
1219  struct {
1220  uint8_t TRCPT0:1;
1221  uint8_t TRCPT1:1;
1222  uint8_t TRFAIL0:1;
1223  uint8_t TRFAIL1:1;
1224  uint8_t RXSTP:1;
1225  uint8_t STALL0:1;
1226  uint8_t STALL1:1;
1227  uint8_t :1;
1228  } bit;
1229  struct {
1230  uint8_t TRCPT:2;
1231  uint8_t TRFAIL:2;
1232  uint8_t :1;
1233  uint8_t STALL:2;
1234  uint8_t :1;
1235  } vec;
1236  uint8_t reg;
1238 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1239 
1240 #define USB_DEVICE_EPINTENCLR_OFFSET 0x108
1241 #define USB_DEVICE_EPINTENCLR_RESETVALUE _U_(0x00)
1243 #define USB_DEVICE_EPINTENCLR_TRCPT0_Pos 0
1244 #define USB_DEVICE_EPINTENCLR_TRCPT0 (_U_(1) << USB_DEVICE_EPINTENCLR_TRCPT0_Pos)
1245 #define USB_DEVICE_EPINTENCLR_TRCPT1_Pos 1
1246 #define USB_DEVICE_EPINTENCLR_TRCPT1 (_U_(1) << USB_DEVICE_EPINTENCLR_TRCPT1_Pos)
1247 #define USB_DEVICE_EPINTENCLR_TRCPT_Pos 0
1248 #define USB_DEVICE_EPINTENCLR_TRCPT_Msk (_U_(0x3) << USB_DEVICE_EPINTENCLR_TRCPT_Pos)
1249 #define USB_DEVICE_EPINTENCLR_TRCPT(value) (USB_DEVICE_EPINTENCLR_TRCPT_Msk & ((value) << USB_DEVICE_EPINTENCLR_TRCPT_Pos))
1250 #define USB_DEVICE_EPINTENCLR_TRFAIL0_Pos 2
1251 #define USB_DEVICE_EPINTENCLR_TRFAIL0 (_U_(1) << USB_DEVICE_EPINTENCLR_TRFAIL0_Pos)
1252 #define USB_DEVICE_EPINTENCLR_TRFAIL1_Pos 3
1253 #define USB_DEVICE_EPINTENCLR_TRFAIL1 (_U_(1) << USB_DEVICE_EPINTENCLR_TRFAIL1_Pos)
1254 #define USB_DEVICE_EPINTENCLR_TRFAIL_Pos 2
1255 #define USB_DEVICE_EPINTENCLR_TRFAIL_Msk (_U_(0x3) << USB_DEVICE_EPINTENCLR_TRFAIL_Pos)
1256 #define USB_DEVICE_EPINTENCLR_TRFAIL(value) (USB_DEVICE_EPINTENCLR_TRFAIL_Msk & ((value) << USB_DEVICE_EPINTENCLR_TRFAIL_Pos))
1257 #define USB_DEVICE_EPINTENCLR_RXSTP_Pos 4
1258 #define USB_DEVICE_EPINTENCLR_RXSTP (_U_(0x1) << USB_DEVICE_EPINTENCLR_RXSTP_Pos)
1259 #define USB_DEVICE_EPINTENCLR_STALL0_Pos 5
1260 #define USB_DEVICE_EPINTENCLR_STALL0 (_U_(1) << USB_DEVICE_EPINTENCLR_STALL0_Pos)
1261 #define USB_DEVICE_EPINTENCLR_STALL1_Pos 6
1262 #define USB_DEVICE_EPINTENCLR_STALL1 (_U_(1) << USB_DEVICE_EPINTENCLR_STALL1_Pos)
1263 #define USB_DEVICE_EPINTENCLR_STALL_Pos 5
1264 #define USB_DEVICE_EPINTENCLR_STALL_Msk (_U_(0x3) << USB_DEVICE_EPINTENCLR_STALL_Pos)
1265 #define USB_DEVICE_EPINTENCLR_STALL(value) (USB_DEVICE_EPINTENCLR_STALL_Msk & ((value) << USB_DEVICE_EPINTENCLR_STALL_Pos))
1266 #define USB_DEVICE_EPINTENCLR_MASK _U_(0x7F)
1268 /* -------- USB_HOST_PINTENCLR : (USB Offset: 0x108) (R/W 8) HOST HOST_PIPE Pipe Interrupt Flag Clear -------- */
1269 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1270 typedef union {
1271  struct {
1272  uint8_t TRCPT0:1;
1273  uint8_t TRCPT1:1;
1274  uint8_t TRFAIL:1;
1275  uint8_t PERR:1;
1276  uint8_t TXSTP:1;
1277  uint8_t STALL:1;
1278  uint8_t :2;
1279  } bit;
1280  struct {
1281  uint8_t TRCPT:2;
1282  uint8_t :6;
1283  } vec;
1284  uint8_t reg;
1286 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1287 
1288 #define USB_HOST_PINTENCLR_OFFSET 0x108
1289 #define USB_HOST_PINTENCLR_RESETVALUE _U_(0x00)
1291 #define USB_HOST_PINTENCLR_TRCPT0_Pos 0
1292 #define USB_HOST_PINTENCLR_TRCPT0 (_U_(1) << USB_HOST_PINTENCLR_TRCPT0_Pos)
1293 #define USB_HOST_PINTENCLR_TRCPT1_Pos 1
1294 #define USB_HOST_PINTENCLR_TRCPT1 (_U_(1) << USB_HOST_PINTENCLR_TRCPT1_Pos)
1295 #define USB_HOST_PINTENCLR_TRCPT_Pos 0
1296 #define USB_HOST_PINTENCLR_TRCPT_Msk (_U_(0x3) << USB_HOST_PINTENCLR_TRCPT_Pos)
1297 #define USB_HOST_PINTENCLR_TRCPT(value) (USB_HOST_PINTENCLR_TRCPT_Msk & ((value) << USB_HOST_PINTENCLR_TRCPT_Pos))
1298 #define USB_HOST_PINTENCLR_TRFAIL_Pos 2
1299 #define USB_HOST_PINTENCLR_TRFAIL (_U_(0x1) << USB_HOST_PINTENCLR_TRFAIL_Pos)
1300 #define USB_HOST_PINTENCLR_PERR_Pos 3
1301 #define USB_HOST_PINTENCLR_PERR (_U_(0x1) << USB_HOST_PINTENCLR_PERR_Pos)
1302 #define USB_HOST_PINTENCLR_TXSTP_Pos 4
1303 #define USB_HOST_PINTENCLR_TXSTP (_U_(0x1) << USB_HOST_PINTENCLR_TXSTP_Pos)
1304 #define USB_HOST_PINTENCLR_STALL_Pos 5
1305 #define USB_HOST_PINTENCLR_STALL (_U_(0x1) << USB_HOST_PINTENCLR_STALL_Pos)
1306 #define USB_HOST_PINTENCLR_MASK _U_(0x3F)
1308 /* -------- USB_DEVICE_EPINTENSET : (USB Offset: 0x109) (R/W 8) DEVICE DEVICE_ENDPOINT End Point Interrupt Set Flag -------- */
1309 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1310 typedef union {
1311  struct {
1312  uint8_t TRCPT0:1;
1313  uint8_t TRCPT1:1;
1314  uint8_t TRFAIL0:1;
1315  uint8_t TRFAIL1:1;
1316  uint8_t RXSTP:1;
1317  uint8_t STALL0:1;
1318  uint8_t STALL1:1;
1319  uint8_t :1;
1320  } bit;
1321  struct {
1322  uint8_t TRCPT:2;
1323  uint8_t TRFAIL:2;
1324  uint8_t :1;
1325  uint8_t STALL:2;
1326  uint8_t :1;
1327  } vec;
1328  uint8_t reg;
1330 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1331 
1332 #define USB_DEVICE_EPINTENSET_OFFSET 0x109
1333 #define USB_DEVICE_EPINTENSET_RESETVALUE _U_(0x00)
1335 #define USB_DEVICE_EPINTENSET_TRCPT0_Pos 0
1336 #define USB_DEVICE_EPINTENSET_TRCPT0 (_U_(1) << USB_DEVICE_EPINTENSET_TRCPT0_Pos)
1337 #define USB_DEVICE_EPINTENSET_TRCPT1_Pos 1
1338 #define USB_DEVICE_EPINTENSET_TRCPT1 (_U_(1) << USB_DEVICE_EPINTENSET_TRCPT1_Pos)
1339 #define USB_DEVICE_EPINTENSET_TRCPT_Pos 0
1340 #define USB_DEVICE_EPINTENSET_TRCPT_Msk (_U_(0x3) << USB_DEVICE_EPINTENSET_TRCPT_Pos)
1341 #define USB_DEVICE_EPINTENSET_TRCPT(value) (USB_DEVICE_EPINTENSET_TRCPT_Msk & ((value) << USB_DEVICE_EPINTENSET_TRCPT_Pos))
1342 #define USB_DEVICE_EPINTENSET_TRFAIL0_Pos 2
1343 #define USB_DEVICE_EPINTENSET_TRFAIL0 (_U_(1) << USB_DEVICE_EPINTENSET_TRFAIL0_Pos)
1344 #define USB_DEVICE_EPINTENSET_TRFAIL1_Pos 3
1345 #define USB_DEVICE_EPINTENSET_TRFAIL1 (_U_(1) << USB_DEVICE_EPINTENSET_TRFAIL1_Pos)
1346 #define USB_DEVICE_EPINTENSET_TRFAIL_Pos 2
1347 #define USB_DEVICE_EPINTENSET_TRFAIL_Msk (_U_(0x3) << USB_DEVICE_EPINTENSET_TRFAIL_Pos)
1348 #define USB_DEVICE_EPINTENSET_TRFAIL(value) (USB_DEVICE_EPINTENSET_TRFAIL_Msk & ((value) << USB_DEVICE_EPINTENSET_TRFAIL_Pos))
1349 #define USB_DEVICE_EPINTENSET_RXSTP_Pos 4
1350 #define USB_DEVICE_EPINTENSET_RXSTP (_U_(0x1) << USB_DEVICE_EPINTENSET_RXSTP_Pos)
1351 #define USB_DEVICE_EPINTENSET_STALL0_Pos 5
1352 #define USB_DEVICE_EPINTENSET_STALL0 (_U_(1) << USB_DEVICE_EPINTENSET_STALL0_Pos)
1353 #define USB_DEVICE_EPINTENSET_STALL1_Pos 6
1354 #define USB_DEVICE_EPINTENSET_STALL1 (_U_(1) << USB_DEVICE_EPINTENSET_STALL1_Pos)
1355 #define USB_DEVICE_EPINTENSET_STALL_Pos 5
1356 #define USB_DEVICE_EPINTENSET_STALL_Msk (_U_(0x3) << USB_DEVICE_EPINTENSET_STALL_Pos)
1357 #define USB_DEVICE_EPINTENSET_STALL(value) (USB_DEVICE_EPINTENSET_STALL_Msk & ((value) << USB_DEVICE_EPINTENSET_STALL_Pos))
1358 #define USB_DEVICE_EPINTENSET_MASK _U_(0x7F)
1360 /* -------- USB_HOST_PINTENSET : (USB Offset: 0x109) (R/W 8) HOST HOST_PIPE Pipe Interrupt Flag Set -------- */
1361 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1362 typedef union {
1363  struct {
1364  uint8_t TRCPT0:1;
1365  uint8_t TRCPT1:1;
1366  uint8_t TRFAIL:1;
1367  uint8_t PERR:1;
1368  uint8_t TXSTP:1;
1369  uint8_t STALL:1;
1370  uint8_t :2;
1371  } bit;
1372  struct {
1373  uint8_t TRCPT:2;
1374  uint8_t :6;
1375  } vec;
1376  uint8_t reg;
1378 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1379 
1380 #define USB_HOST_PINTENSET_OFFSET 0x109
1381 #define USB_HOST_PINTENSET_RESETVALUE _U_(0x00)
1383 #define USB_HOST_PINTENSET_TRCPT0_Pos 0
1384 #define USB_HOST_PINTENSET_TRCPT0 (_U_(1) << USB_HOST_PINTENSET_TRCPT0_Pos)
1385 #define USB_HOST_PINTENSET_TRCPT1_Pos 1
1386 #define USB_HOST_PINTENSET_TRCPT1 (_U_(1) << USB_HOST_PINTENSET_TRCPT1_Pos)
1387 #define USB_HOST_PINTENSET_TRCPT_Pos 0
1388 #define USB_HOST_PINTENSET_TRCPT_Msk (_U_(0x3) << USB_HOST_PINTENSET_TRCPT_Pos)
1389 #define USB_HOST_PINTENSET_TRCPT(value) (USB_HOST_PINTENSET_TRCPT_Msk & ((value) << USB_HOST_PINTENSET_TRCPT_Pos))
1390 #define USB_HOST_PINTENSET_TRFAIL_Pos 2
1391 #define USB_HOST_PINTENSET_TRFAIL (_U_(0x1) << USB_HOST_PINTENSET_TRFAIL_Pos)
1392 #define USB_HOST_PINTENSET_PERR_Pos 3
1393 #define USB_HOST_PINTENSET_PERR (_U_(0x1) << USB_HOST_PINTENSET_PERR_Pos)
1394 #define USB_HOST_PINTENSET_TXSTP_Pos 4
1395 #define USB_HOST_PINTENSET_TXSTP (_U_(0x1) << USB_HOST_PINTENSET_TXSTP_Pos)
1396 #define USB_HOST_PINTENSET_STALL_Pos 5
1397 #define USB_HOST_PINTENSET_STALL (_U_(0x1) << USB_HOST_PINTENSET_STALL_Pos)
1398 #define USB_HOST_PINTENSET_MASK _U_(0x3F)
1400 /* -------- USB_DEVICE_ADDR : (USB Offset: 0x000) (R/W 32) DEVICE DEVICE_DESC_BANK Endpoint Bank, Adress of Data Buffer -------- */
1401 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1402 typedef union {
1403  struct {
1404  uint32_t ADDR:32;
1405  } bit;
1406  uint32_t reg;
1408 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1409 
1410 #define USB_DEVICE_ADDR_OFFSET 0x000
1412 #define USB_DEVICE_ADDR_ADDR_Pos 0
1413 #define USB_DEVICE_ADDR_ADDR_Msk (_U_(0xFFFFFFFF) << USB_DEVICE_ADDR_ADDR_Pos)
1414 #define USB_DEVICE_ADDR_ADDR(value) (USB_DEVICE_ADDR_ADDR_Msk & ((value) << USB_DEVICE_ADDR_ADDR_Pos))
1415 #define USB_DEVICE_ADDR_MASK _U_(0xFFFFFFFF)
1417 /* -------- USB_HOST_ADDR : (USB Offset: 0x000) (R/W 32) HOST HOST_DESC_BANK Host Bank, Adress of Data Buffer -------- */
1418 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1419 typedef union {
1420  struct {
1421  uint32_t ADDR:32;
1422  } bit;
1423  uint32_t reg;
1425 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1426 
1427 #define USB_HOST_ADDR_OFFSET 0x000
1429 #define USB_HOST_ADDR_ADDR_Pos 0
1430 #define USB_HOST_ADDR_ADDR_Msk (_U_(0xFFFFFFFF) << USB_HOST_ADDR_ADDR_Pos)
1431 #define USB_HOST_ADDR_ADDR(value) (USB_HOST_ADDR_ADDR_Msk & ((value) << USB_HOST_ADDR_ADDR_Pos))
1432 #define USB_HOST_ADDR_MASK _U_(0xFFFFFFFF)
1434 /* -------- USB_DEVICE_PCKSIZE : (USB Offset: 0x004) (R/W 32) DEVICE DEVICE_DESC_BANK Endpoint Bank, Packet Size -------- */
1435 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1436 typedef union {
1437  struct {
1438  uint32_t BYTE_COUNT:14;
1439  uint32_t MULTI_PACKET_SIZE:14;
1440  uint32_t SIZE:3;
1441  uint32_t AUTO_ZLP:1;
1442  } bit;
1443  uint32_t reg;
1445 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1446 
1447 #define USB_DEVICE_PCKSIZE_OFFSET 0x004
1449 #define USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos 0
1450 #define USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk (_U_(0x3FFF) << USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos)
1451 #define USB_DEVICE_PCKSIZE_BYTE_COUNT(value) (USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk & ((value) << USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos))
1452 #define USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos 14
1453 #define USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk (_U_(0x3FFF) << USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos)
1454 #define USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(value) (USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk & ((value) << USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos))
1455 #define USB_DEVICE_PCKSIZE_SIZE_Pos 28
1456 #define USB_DEVICE_PCKSIZE_SIZE_Msk (_U_(0x7) << USB_DEVICE_PCKSIZE_SIZE_Pos)
1457 #define USB_DEVICE_PCKSIZE_SIZE(value) (USB_DEVICE_PCKSIZE_SIZE_Msk & ((value) << USB_DEVICE_PCKSIZE_SIZE_Pos))
1458 #define USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos 31
1459 #define USB_DEVICE_PCKSIZE_AUTO_ZLP (_U_(0x1) << USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos)
1460 #define USB_DEVICE_PCKSIZE_MASK _U_(0xFFFFFFFF)
1462 /* -------- USB_HOST_PCKSIZE : (USB Offset: 0x004) (R/W 32) HOST HOST_DESC_BANK Host Bank, Packet Size -------- */
1463 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1464 typedef union {
1465  struct {
1466  uint32_t BYTE_COUNT:14;
1467  uint32_t MULTI_PACKET_SIZE:14;
1468  uint32_t SIZE:3;
1469  uint32_t AUTO_ZLP:1;
1470  } bit;
1471  uint32_t reg;
1473 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1474 
1475 #define USB_HOST_PCKSIZE_OFFSET 0x004
1477 #define USB_HOST_PCKSIZE_BYTE_COUNT_Pos 0
1478 #define USB_HOST_PCKSIZE_BYTE_COUNT_Msk (_U_(0x3FFF) << USB_HOST_PCKSIZE_BYTE_COUNT_Pos)
1479 #define USB_HOST_PCKSIZE_BYTE_COUNT(value) (USB_HOST_PCKSIZE_BYTE_COUNT_Msk & ((value) << USB_HOST_PCKSIZE_BYTE_COUNT_Pos))
1480 #define USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos 14
1481 #define USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk (_U_(0x3FFF) << USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos)
1482 #define USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(value) (USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk & ((value) << USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos))
1483 #define USB_HOST_PCKSIZE_SIZE_Pos 28
1484 #define USB_HOST_PCKSIZE_SIZE_Msk (_U_(0x7) << USB_HOST_PCKSIZE_SIZE_Pos)
1485 #define USB_HOST_PCKSIZE_SIZE(value) (USB_HOST_PCKSIZE_SIZE_Msk & ((value) << USB_HOST_PCKSIZE_SIZE_Pos))
1486 #define USB_HOST_PCKSIZE_AUTO_ZLP_Pos 31
1487 #define USB_HOST_PCKSIZE_AUTO_ZLP (_U_(0x1) << USB_HOST_PCKSIZE_AUTO_ZLP_Pos)
1488 #define USB_HOST_PCKSIZE_MASK _U_(0xFFFFFFFF)
1490 /* -------- USB_DEVICE_EXTREG : (USB Offset: 0x008) (R/W 16) DEVICE DEVICE_DESC_BANK Endpoint Bank, Extended -------- */
1491 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1492 typedef union {
1493  struct {
1494  uint16_t SUBPID:4;
1495  uint16_t VARIABLE:11;
1496  uint16_t :1;
1497  } bit;
1498  uint16_t reg;
1500 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1501 
1502 #define USB_DEVICE_EXTREG_OFFSET 0x008
1504 #define USB_DEVICE_EXTREG_SUBPID_Pos 0
1505 #define USB_DEVICE_EXTREG_SUBPID_Msk (_U_(0xF) << USB_DEVICE_EXTREG_SUBPID_Pos)
1506 #define USB_DEVICE_EXTREG_SUBPID(value) (USB_DEVICE_EXTREG_SUBPID_Msk & ((value) << USB_DEVICE_EXTREG_SUBPID_Pos))
1507 #define USB_DEVICE_EXTREG_VARIABLE_Pos 4
1508 #define USB_DEVICE_EXTREG_VARIABLE_Msk (_U_(0x7FF) << USB_DEVICE_EXTREG_VARIABLE_Pos)
1509 #define USB_DEVICE_EXTREG_VARIABLE(value) (USB_DEVICE_EXTREG_VARIABLE_Msk & ((value) << USB_DEVICE_EXTREG_VARIABLE_Pos))
1510 #define USB_DEVICE_EXTREG_MASK _U_(0x7FFF)
1512 /* -------- USB_HOST_EXTREG : (USB Offset: 0x008) (R/W 16) HOST HOST_DESC_BANK Host Bank, Extended -------- */
1513 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1514 typedef union {
1515  struct {
1516  uint16_t SUBPID:4;
1517  uint16_t VARIABLE:11;
1518  uint16_t :1;
1519  } bit;
1520  uint16_t reg;
1522 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1523 
1524 #define USB_HOST_EXTREG_OFFSET 0x008
1526 #define USB_HOST_EXTREG_SUBPID_Pos 0
1527 #define USB_HOST_EXTREG_SUBPID_Msk (_U_(0xF) << USB_HOST_EXTREG_SUBPID_Pos)
1528 #define USB_HOST_EXTREG_SUBPID(value) (USB_HOST_EXTREG_SUBPID_Msk & ((value) << USB_HOST_EXTREG_SUBPID_Pos))
1529 #define USB_HOST_EXTREG_VARIABLE_Pos 4
1530 #define USB_HOST_EXTREG_VARIABLE_Msk (_U_(0x7FF) << USB_HOST_EXTREG_VARIABLE_Pos)
1531 #define USB_HOST_EXTREG_VARIABLE(value) (USB_HOST_EXTREG_VARIABLE_Msk & ((value) << USB_HOST_EXTREG_VARIABLE_Pos))
1532 #define USB_HOST_EXTREG_MASK _U_(0x7FFF)
1534 /* -------- USB_DEVICE_STATUS_BK : (USB Offset: 0x00A) (R/W 8) DEVICE DEVICE_DESC_BANK Enpoint Bank, Status of Bank -------- */
1535 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1536 typedef union {
1537  struct {
1538  uint8_t CRCERR:1;
1539  uint8_t ERRORFLOW:1;
1540  uint8_t :6;
1541  } bit;
1542  uint8_t reg;
1544 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1545 
1546 #define USB_DEVICE_STATUS_BK_OFFSET 0x00A
1548 #define USB_DEVICE_STATUS_BK_CRCERR_Pos 0
1549 #define USB_DEVICE_STATUS_BK_CRCERR (_U_(0x1) << USB_DEVICE_STATUS_BK_CRCERR_Pos)
1550 #define USB_DEVICE_STATUS_BK_ERRORFLOW_Pos 1
1551 #define USB_DEVICE_STATUS_BK_ERRORFLOW (_U_(0x1) << USB_DEVICE_STATUS_BK_ERRORFLOW_Pos)
1552 #define USB_DEVICE_STATUS_BK_MASK _U_(0x03)
1554 /* -------- USB_HOST_STATUS_BK : (USB Offset: 0x00A) (R/W 8) HOST HOST_DESC_BANK Host Bank, Status of Bank -------- */
1555 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1556 typedef union {
1557  struct {
1558  uint8_t CRCERR:1;
1559  uint8_t ERRORFLOW:1;
1560  uint8_t :6;
1561  } bit;
1562  uint8_t reg;
1564 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1565 
1566 #define USB_HOST_STATUS_BK_OFFSET 0x00A
1568 #define USB_HOST_STATUS_BK_CRCERR_Pos 0
1569 #define USB_HOST_STATUS_BK_CRCERR (_U_(0x1) << USB_HOST_STATUS_BK_CRCERR_Pos)
1570 #define USB_HOST_STATUS_BK_ERRORFLOW_Pos 1
1571 #define USB_HOST_STATUS_BK_ERRORFLOW (_U_(0x1) << USB_HOST_STATUS_BK_ERRORFLOW_Pos)
1572 #define USB_HOST_STATUS_BK_MASK _U_(0x03)
1574 /* -------- USB_HOST_CTRL_PIPE : (USB Offset: 0x00C) (R/W 16) HOST HOST_DESC_BANK Host Bank, Host Control Pipe -------- */
1575 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1576 typedef union {
1577  struct {
1578  uint16_t PDADDR:7;
1579  uint16_t :1;
1580  uint16_t PEPNUM:4;
1581  uint16_t PERMAX:4;
1582  } bit;
1583  uint16_t reg;
1585 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1586 
1587 #define USB_HOST_CTRL_PIPE_OFFSET 0x00C
1588 #define USB_HOST_CTRL_PIPE_RESETVALUE _U_(0x0000)
1590 #define USB_HOST_CTRL_PIPE_PDADDR_Pos 0
1591 #define USB_HOST_CTRL_PIPE_PDADDR_Msk (_U_(0x7F) << USB_HOST_CTRL_PIPE_PDADDR_Pos)
1592 #define USB_HOST_CTRL_PIPE_PDADDR(value) (USB_HOST_CTRL_PIPE_PDADDR_Msk & ((value) << USB_HOST_CTRL_PIPE_PDADDR_Pos))
1593 #define USB_HOST_CTRL_PIPE_PEPNUM_Pos 8
1594 #define USB_HOST_CTRL_PIPE_PEPNUM_Msk (_U_(0xF) << USB_HOST_CTRL_PIPE_PEPNUM_Pos)
1595 #define USB_HOST_CTRL_PIPE_PEPNUM(value) (USB_HOST_CTRL_PIPE_PEPNUM_Msk & ((value) << USB_HOST_CTRL_PIPE_PEPNUM_Pos))
1596 #define USB_HOST_CTRL_PIPE_PERMAX_Pos 12
1597 #define USB_HOST_CTRL_PIPE_PERMAX_Msk (_U_(0xF) << USB_HOST_CTRL_PIPE_PERMAX_Pos)
1598 #define USB_HOST_CTRL_PIPE_PERMAX(value) (USB_HOST_CTRL_PIPE_PERMAX_Msk & ((value) << USB_HOST_CTRL_PIPE_PERMAX_Pos))
1599 #define USB_HOST_CTRL_PIPE_MASK _U_(0xFF7F)
1601 /* -------- USB_HOST_STATUS_PIPE : (USB Offset: 0x00E) (R/W 16) HOST HOST_DESC_BANK Host Bank, Host Status Pipe -------- */
1602 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1603 typedef union {
1604  struct {
1605  uint16_t DTGLER:1;
1606  uint16_t DAPIDER:1;
1607  uint16_t PIDER:1;
1608  uint16_t TOUTER:1;
1609  uint16_t CRC16ER:1;
1610  uint16_t ERCNT:3;
1611  uint16_t :8;
1612  } bit;
1613  uint16_t reg;
1615 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1616 
1617 #define USB_HOST_STATUS_PIPE_OFFSET 0x00E
1619 #define USB_HOST_STATUS_PIPE_DTGLER_Pos 0
1620 #define USB_HOST_STATUS_PIPE_DTGLER (_U_(0x1) << USB_HOST_STATUS_PIPE_DTGLER_Pos)
1621 #define USB_HOST_STATUS_PIPE_DAPIDER_Pos 1
1622 #define USB_HOST_STATUS_PIPE_DAPIDER (_U_(0x1) << USB_HOST_STATUS_PIPE_DAPIDER_Pos)
1623 #define USB_HOST_STATUS_PIPE_PIDER_Pos 2
1624 #define USB_HOST_STATUS_PIPE_PIDER (_U_(0x1) << USB_HOST_STATUS_PIPE_PIDER_Pos)
1625 #define USB_HOST_STATUS_PIPE_TOUTER_Pos 3
1626 #define USB_HOST_STATUS_PIPE_TOUTER (_U_(0x1) << USB_HOST_STATUS_PIPE_TOUTER_Pos)
1627 #define USB_HOST_STATUS_PIPE_CRC16ER_Pos 4
1628 #define USB_HOST_STATUS_PIPE_CRC16ER (_U_(0x1) << USB_HOST_STATUS_PIPE_CRC16ER_Pos)
1629 #define USB_HOST_STATUS_PIPE_ERCNT_Pos 5
1630 #define USB_HOST_STATUS_PIPE_ERCNT_Msk (_U_(0x7) << USB_HOST_STATUS_PIPE_ERCNT_Pos)
1631 #define USB_HOST_STATUS_PIPE_ERCNT(value) (USB_HOST_STATUS_PIPE_ERCNT_Msk & ((value) << USB_HOST_STATUS_PIPE_ERCNT_Pos))
1632 #define USB_HOST_STATUS_PIPE_MASK _U_(0x00FF)
1635 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1636 typedef struct {
1641  RoReg8 Reserved1[0x5];
1643 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1644 
1646 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1647 typedef struct {
1652  RoReg8 Reserved1[0x1];
1655 } UsbHostDescBank;
1656 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1657 
1659 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1660 typedef struct {
1662  RoReg8 Reserved1[0x3];
1669  RoReg8 Reserved2[0x16];
1671 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1672 
1674 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1675 typedef struct {
1677  RoReg8 Reserved1[0x2];
1685  RoReg8 Reserved2[0x16];
1686 } UsbHostPipe;
1687 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1688 
1690 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1691 typedef struct { /* USB is Device */
1693  RoReg8 Reserved1[0x1];
1696  RoReg8 Reserved2[0x4];
1699  RoReg8 Reserved3[0x1];
1702  RoReg8 Reserved4[0x2];
1704  RoReg8 Reserved5[0x2];
1706  RoReg8 Reserved6[0x2];
1708  RoReg8 Reserved7[0x2];
1710  RoReg8 Reserved8[0x2];
1712  RoReg8 Reserved9[0x2];
1715  RoReg8 Reserved10[0xD6];
1716  UsbDeviceEndpoint DeviceEndpoint[8];
1717 } UsbDevice;
1718 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1719 
1721 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1722 typedef struct { /* USB is Host */
1724  RoReg8 Reserved1[0x1];
1727  RoReg8 Reserved2[0x4];
1730  RoReg8 Reserved3[0x1];
1733  RoReg8 Reserved4[0x2];
1736  RoReg8 Reserved5[0x1];
1738  RoReg8 Reserved6[0x2];
1740  RoReg8 Reserved7[0x2];
1742  RoReg8 Reserved8[0x2];
1744  RoReg8 Reserved9[0x2];
1747  RoReg8 Reserved10[0xD6];
1748  UsbHostPipe HostPipe[8];
1749 } UsbHost;
1750 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1751 
1753 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1754 typedef struct { /* USB is Device */
1755  UsbDeviceDescBank DeviceDescBank[2];
1757 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1758 
1760 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1761 typedef struct { /* USB is Host */
1762  UsbHostDescBank HostDescBank[2];
1764 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1765 
1766 #define SECTION_USB_DESCRIPTOR
1767 
1768 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
1769 typedef union {
1772 } Usb;
1773 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
1774 
1777 #endif /* _SAME54_USB_COMPONENT_ */
USB_DEVICE_INTFLAG_Type
Definition: usb.h:604
USB_DEVICE_EPSTATUSCLR_Type
Definition: usb.h:898
USB_DEVICE_STATUS_BK_Type::ERRORFLOW
uint8_t ERRORFLOW
Definition: usb.h:1539
USB_DEVICE_EPSTATUSSET_Type::reg
uint8_t reg
Definition: usb.h:990
USB_HOST_INTFLAG_Type::RAMACER
__I uint16_t RAMACER
Definition: usb.h:657
UsbDeviceEndpoint::EPSTATUSCLR
__O USB_DEVICE_EPSTATUSCLR_Type EPSTATUSCLR
Offset: 0x004 ( /W 8) DEVICE_ENDPOINT End Point Pipe Status Clear.
Definition: usb.h:1663
USB_HOST_PINTSMRY_Type::EPINT4
uint16_t EPINT4
Definition: usb.h:741
USB_HOST_FLENHIGH_Type::FLENHIGH
uint8_t FLENHIGH
Definition: usb.h:418
UsbDeviceEndpoint::EPINTENCLR
__IO USB_DEVICE_EPINTENCLR_Type EPINTENCLR
Offset: 0x008 (R/W 8) DEVICE_ENDPOINT End Point Interrupt Clear Flag.
Definition: usb.h:1667
UsbDeviceEndpoint
UsbDeviceEndpoint hardware registers.
Definition: usb.h:1660
USB_HOST_PSTATUS_Type::BK0RDY
uint8_t BK0RDY
Definition: usb.h:1102
USB_HOST_STATUS_Type::reg
uint8_t reg
Definition: usb.h:317
USB_DEVICE_EPSTATUSSET_Type::CURBK
uint8_t CURBK
Definition: usb.h:978
USB_HOST_BINTERVAL_Type
Definition: usb.h:880
USB_DEVICE_EPINTENCLR_Type::TRFAIL1
uint8_t TRFAIL1
Definition: usb.h:1223
USB_HOST_PINTFLAG_Type
Definition: usb.h:1178
USB_DEVICE_FNUM_Type::FNUM
uint16_t FNUM
Definition: usb.h:370
USB_HOST_PSTATUS_Type::CURBK
uint8_t CURBK
Definition: usb.h:1098
USB_HOST_PSTATUSSET_Type::CURBK
uint8_t CURBK
Definition: usb.h:1022
USB_DEVICE_EPINTSMRY_Type::EPINT
uint16_t EPINT
Definition: usb.h:702
USB_DEVICE_INTFLAG_Type::LPMNYET
__I uint16_t LPMNYET
Definition: usb.h:614
UsbHost::INTENSET
__IO USB_HOST_INTENSET_Type INTENSET
Offset: 0x018 (R/W 16) HOST Host Interrupt Enable Set.
Definition: usb.h:1739
UsbDevice::FNUM
__I USB_DEVICE_FNUM_Type FNUM
Offset: 0x010 (R/ 16) DEVICE Device Frame Number.
Definition: usb.h:1703
USB_HOST_FLENHIGH_Type::reg
uint8_t reg
Definition: usb.h:420
USB_HOST_INTFLAG_Type::uint16_t
__I uint16_t
Definition: usb.h:651
USB_DEVICE_FNUM_Type::FNCERR
uint16_t FNCERR
Definition: usb.h:372
UsbHost::HSOFC
__IO USB_HOST_HSOFC_Type HSOFC
Offset: 0x00A (R/W 8) HOST Host Start Of Frame Control.
Definition: usb.h:1729
USB_HOST_INTENSET_Type::WAKEUP
uint16_t WAKEUP
Definition: usb.h:569
USB_PADCAL_Type::TRANSN
uint16_t TRANSN
Definition: usb.h:803
USB_HOST_PCFG_Type
Definition: usb.h:854
USB_CTRLA_Type::reg
uint8_t reg
Definition: usb.h:52
USB_HOST_INTFLAG_Type::UPRSM
__I uint16_t UPRSM
Definition: usb.h:656
USB_DEVICE_EPINTFLAG_Type::TRCPT1
__I uint8_t TRCPT1
Definition: usb.h:1129
USB_DEVICE_EPSTATUSSET_Type::STALLRQ
uint8_t STALLRQ
Definition: usb.h:987
USB_DEVICE_EPINTENCLR_Type::TRCPT1
uint8_t TRCPT1
Definition: usb.h:1221
USB_DEVICE_EPINTENCLR_Type::STALL0
uint8_t STALL0
Definition: usb.h:1225
USB_HOST_CTRLB_Type::BUSRESET
uint16_t BUSRESET
Definition: usb.h:192
USB_HOST_PINTENCLR_Type::TRCPT1
uint8_t TRCPT1
Definition: usb.h:1273
USB_DEVICE_EPSTATUSSET_Type::DTGLIN
uint8_t DTGLIN
Definition: usb.h:977
USB_DEVICE_EPSTATUSSET_Type::STALLRQ1
uint8_t STALLRQ1
Definition: usb.h:981
USB_DEVICE_INTENCLR_Type::EORSM
uint16_t EORSM
Definition: usb.h:441
USB_CTRLA_Type
Definition: usb.h:44
USB_DEVICE_STATUS_BK_Type::CRCERR
uint8_t CRCERR
Definition: usb.h:1538
USB_DEVICE_EXTREG_Type
Definition: usb.h:1492
USB_DEVICE_CTRLB_Type::NREPLY
uint16_t NREPLY
Definition: usb.h:124
UsbHostPipe::PSTATUSCLR
__O USB_HOST_PSTATUSCLR_Type PSTATUSCLR
Offset: 0x004 ( /W 8) HOST_PIPE End Point Pipe Status Clear.
Definition: usb.h:1679
USB_DEVICE_PCKSIZE_Type::BYTE_COUNT
uint32_t BYTE_COUNT
Definition: usb.h:1438
USB_DEVICE_EPINTENCLR_Type::TRFAIL
uint8_t TRFAIL
Definition: usb.h:1231
USB_DEVICE_INTFLAG_Type::reg
uint16_t reg
Definition: usb.h:618
USB_DEVICE_INTENSET_Type::RAMACER
uint16_t RAMACER
Definition: usb.h:528
USB_HOST_INTENCLR_Type::DDISC
uint16_t DDISC
Definition: usb.h:489
USB_DEVICE_INTENCLR_Type::MSOF
uint16_t MSOF
Definition: usb.h:437
USB_DEVICE_EPSTATUSCLR_Type::DTGLIN
uint8_t DTGLIN
Definition: usb.h:901
USB_HOST_INTFLAG_Type
Definition: usb.h:649
USB_PADCAL_Type::TRIM
uint16_t TRIM
Definition: usb.h:805
USB_DEVICE_EPINTFLAG_Type::reg
uint8_t reg
Definition: usb.h:1144
USB_DEVICE_FNUM_Type::MFNUM
uint16_t MFNUM
Definition: usb.h:369
USB_DEVICE_EPSTATUSCLR_Type::reg
uint8_t reg
Definition: usb.h:914
USB_HOST_PINTFLAG_Type::TRCPT1
__I uint8_t TRCPT1
Definition: usb.h:1181
USB_DEVICE_INTFLAG_Type::MSOF
__I uint16_t MSOF
Definition: usb.h:607
UsbDevice::CTRLA
__IO USB_CTRLA_Type CTRLA
Offset: 0x000 (R/W 8) Control A.
Definition: usb.h:1692
USB_DEVICE_INTENSET_Type
Definition: usb.h:519
UsbDevice::INTFLAG
__IO USB_DEVICE_INTFLAG_Type INTFLAG
Offset: 0x01C (R/W 16) DEVICE Device Interrupt Flag.
Definition: usb.h:1709
USB_DEVICE_INTENCLR_Type::RAMACER
uint16_t RAMACER
Definition: usb.h:443
USB_HOST_INTENCLR_Type
Definition: usb.h:479
USB_DEVICE_EPINTSMRY_Type::EPINT2
uint16_t EPINT2
Definition: usb.h:693
USB_HOST_INTENSET_Type
Definition: usb.h:564
UsbHost::FNUM
__IO USB_HOST_FNUM_Type FNUM
Offset: 0x010 (R/W 16) HOST Host Frame Number.
Definition: usb.h:1734
USB_DEVICE_CTRLB_Type::reg
uint16_t reg
Definition: usb.h:133
USB_HOST_PCKSIZE_Type::reg
uint32_t reg
Definition: usb.h:1471
USB_HOST_PCKSIZE_Type::BYTE_COUNT
uint32_t BYTE_COUNT
Definition: usb.h:1466
USB_HOST_CTRLB_Type::RESUME
uint16_t RESUME
Definition: usb.h:185
USB_DEVICE_EPSTATUSSET_Type::BK1RDY
uint8_t BK1RDY
Definition: usb.h:983
USB_DESCADD_Type::DESCADD
uint32_t DESCADD
Definition: usb.h:783
USB_HOST_PSTATUS_Type::DTGL
uint8_t DTGL
Definition: usb.h:1096
UsbHost::PINTSMRY
__I USB_HOST_PINTSMRY_Type PINTSMRY
Offset: 0x020 (R/ 16) HOST Pipe Interrupt Summary.
Definition: usb.h:1743
USB_HOST_BINTERVAL_Type::reg
uint8_t reg
Definition: usb.h:884
USB_HOST_PINTENSET_Type::TRCPT
uint8_t TRCPT
Definition: usb.h:1373
USB_HOST_PSTATUSCLR_Type::PFREEZE
uint8_t PFREEZE
Definition: usb.h:948
USB_DEVICE_CTRLB_Type::DETACH
uint16_t DETACH
Definition: usb.h:121
USB_HOST_PCFG_Type::PTOKEN
uint8_t PTOKEN
Definition: usb.h:856
USB_HOST_PSTATUSCLR_Type
Definition: usb.h:942
USB_HOST_STATUS_PIPE_Type::DTGLER
uint16_t DTGLER
Definition: usb.h:1605
USB_HOST_STATUS_BK_Type::ERRORFLOW
uint8_t ERRORFLOW
Definition: usb.h:1559
USB_DEVICE_INTENSET_Type::SOF
uint16_t SOF
Definition: usb.h:523
UsbDevice::INTENSET
__IO USB_DEVICE_INTENSET_Type INTENSET
Offset: 0x018 (R/W 16) DEVICE Device Interrupt Enable Set.
Definition: usb.h:1707
UsbDevice::INTENCLR
__IO USB_DEVICE_INTENCLR_Type INTENCLR
Offset: 0x014 (R/W 16) DEVICE Device Interrupt Enable Clear.
Definition: usb.h:1705
USB_DEVICE_INTENCLR_Type::SUSPEND
uint16_t SUSPEND
Definition: usb.h:436
USB_DEVICE_CTRLB_Type::TSTK
uint16_t TSTK
Definition: usb.h:126
USB_HOST_PSTATUS_Type::PFREEZE
uint8_t PFREEZE
Definition: usb.h:1100
USB_DEVICE_PCKSIZE_Type::reg
uint32_t reg
Definition: usb.h:1443
USB_DEVICE_DADD_Type::DADD
uint8_t DADD
Definition: usb.h:233
USB_DEVICE_EPINTSMRY_Type::reg
uint16_t reg
Definition: usb.h:705
UsbHost::QOSCTRL
__IO USB_QOSCTRL_Type QOSCTRL
Offset: 0x003 (R/W 8) USB Quality Of Service.
Definition: usb.h:1726
USB_HOST_PINTSMRY_Type::EPINT5
uint16_t EPINT5
Definition: usb.h:742
USB_HOST_PCFG_Type::BK
uint8_t BK
Definition: usb.h:857
UsbHostDescBank::EXTREG
__IO USB_HOST_EXTREG_Type EXTREG
Offset: 0x008 (R/W 16) HOST_DESC_BANK Host Bank, Extended.
Definition: usb.h:1650
USB_DEVICE_INTFLAG_Type::SOF
__I uint16_t SOF
Definition: usb.h:608
USB_HOST_INTENCLR_Type::UPRSM
uint16_t UPRSM
Definition: usb.h:486
USB_HOST_FNUM_Type::FNUM
uint16_t FNUM
Definition: usb.h:396
USB_DEVICE_DADD_Type::ADDEN
uint8_t ADDEN
Definition: usb.h:234
USB_DEVICE_EPINTSMRY_Type::EPINT5
uint16_t EPINT5
Definition: usb.h:696
UsbDeviceEndpoint::EPSTATUSSET
__O USB_DEVICE_EPSTATUSSET_Type EPSTATUSSET
Offset: 0x005 ( /W 8) DEVICE_ENDPOINT End Point Pipe Status Set.
Definition: usb.h:1664
USB_HOST_PINTENSET_Type::TRCPT1
uint8_t TRCPT1
Definition: usb.h:1365
USB_PADCAL_Type
Definition: usb.h:799
USB_HOST_INTENCLR_Type::reg
uint16_t reg
Definition: usb.h:492
USB_DEVICE_INTENCLR_Type::WAKEUP
uint16_t WAKEUP
Definition: usb.h:440
USB_QOSCTRL_Type::CQOS
uint8_t CQOS
Definition: usb.h:98
USB_HOST_PSTATUSCLR_Type::BK1RDY
uint8_t BK1RDY
Definition: usb.h:951
UsbDevice
USB_DEVICE APB hardware registers.
Definition: usb.h:1691
UsbHostPipe::PINTFLAG
__IO USB_HOST_PINTFLAG_Type PINTFLAG
Offset: 0x007 (R/W 8) HOST_PIPE Pipe Interrupt Flag.
Definition: usb.h:1682
USB_DEVICE_INTENSET_Type::EORST
uint16_t EORST
Definition: usb.h:524
USB_DEVICE_EPINTENSET_Type::STALL0
uint8_t STALL0
Definition: usb.h:1317
UsbHostPipe::PSTATUS
__I USB_HOST_PSTATUS_Type PSTATUS
Offset: 0x006 (R/ 8) HOST_PIPE End Point Pipe Status.
Definition: usb.h:1681
USB_HOST_PINTENCLR_Type::reg
uint8_t reg
Definition: usb.h:1284
USB_DEVICE_STATUS_BK_Type::reg
uint8_t reg
Definition: usb.h:1542
USB_HOST_CTRLB_Type::SPDCONF
uint16_t SPDCONF
Definition: usb.h:186
USB_DEVICE_EPSTATUS_Type::BK1RDY
uint8_t BK1RDY
Definition: usb.h:1059
USB_HOST_PINTENCLR_Type::TRCPT0
uint8_t TRCPT0
Definition: usb.h:1272
UsbDevice::EPINTSMRY
__I USB_DEVICE_EPINTSMRY_Type EPINTSMRY
Offset: 0x020 (R/ 16) DEVICE End Point Interrupt Summary.
Definition: usb.h:1711
Usb::DEVICE
UsbDevice DEVICE
Offset: 0x000 USB is Device.
Definition: usb.h:1770
USB_DEVICE_INTENSET_Type::LPMNYET
uint16_t LPMNYET
Definition: usb.h:529
USB_HOST_PINTENCLR_Type::TXSTP
uint8_t TXSTP
Definition: usb.h:1276
UsbDeviceEndpoint::EPINTFLAG
__IO USB_DEVICE_EPINTFLAG_Type EPINTFLAG
Offset: 0x007 (R/W 8) DEVICE_ENDPOINT End Point Interrupt Flag.
Definition: usb.h:1666
USB_DEVICE_EPSTATUSCLR_Type::STALLRQ1
uint8_t STALLRQ1
Definition: usb.h:905
USB_HOST_PINTSMRY_Type::EPINT3
uint16_t EPINT3
Definition: usb.h:740
USB_DEVICE_CTRLB_Type::SPDCONF
uint16_t SPDCONF
Definition: usb.h:123
UsbHostDescriptor
USB_HOST Descriptor SRAM registers.
Definition: usb.h:1761
USB_DEVICE_EPSTATUSSET_Type::DTGLOUT
uint8_t DTGLOUT
Definition: usb.h:976
USB_HOST_CTRLB_Type::VBUSOK
uint16_t VBUSOK
Definition: usb.h:193
UsbDevice::CTRLB
__IO USB_DEVICE_CTRLB_Type CTRLB
Offset: 0x008 (R/W 16) DEVICE Control B.
Definition: usb.h:1697
USB_DEVICE_CTRLB_Type::TSTPCKT
uint16_t TSTPCKT
Definition: usb.h:127
USB_HOST_HSOFC_Type::FLENC
uint8_t FLENC
Definition: usb.h:254
USB_HOST_PCFG_Type::reg
uint8_t reg
Definition: usb.h:861
USB_HOST_PSTATUSCLR_Type::BK0RDY
uint8_t BK0RDY
Definition: usb.h:950
USB_DEVICE_EPINTENCLR_Type::TRCPT0
uint8_t TRCPT0
Definition: usb.h:1220
USB_HOST_PINTSMRY_Type::EPINT7
uint16_t EPINT7
Definition: usb.h:744
USB_HOST_PINTSMRY_Type::reg
uint16_t reg
Definition: usb.h:751
USB_DEVICE_PCKSIZE_Type
Definition: usb.h:1436
USB_DEVICE_EPSTATUSCLR_Type::CURBK
uint8_t CURBK
Definition: usb.h:902
USB_DEVICE_EPINTSMRY_Type::EPINT0
uint16_t EPINT0
Definition: usb.h:691
USB_HOST_INTENCLR_Type::DCONN
uint16_t DCONN
Definition: usb.h:488
USB_HOST_PINTENSET_Type::TRFAIL
uint8_t TRFAIL
Definition: usb.h:1366
USB_HOST_STATUS_PIPE_Type::PIDER
uint16_t PIDER
Definition: usb.h:1607
USB_HOST_CTRL_PIPE_Type::PEPNUM
uint16_t PEPNUM
Definition: usb.h:1580
USB_DEVICE_STATUS_Type
Definition: usb.h:274
USB_DEVICE_EPINTENCLR_Type::TRFAIL0
uint8_t TRFAIL0
Definition: usb.h:1222
USB_HOST_INTFLAG_Type::HSOF
__I uint16_t HSOF
Definition: usb.h:652
USB_HOST_BINTERVAL_Type::BITINTERVAL
uint8_t BITINTERVAL
Definition: usb.h:882
UsbHost::FLENHIGH
__I USB_HOST_FLENHIGH_Type FLENHIGH
Offset: 0x012 (R/ 8) HOST Host Frame Length.
Definition: usb.h:1735
USB_DEVICE_PCKSIZE_Type::MULTI_PACKET_SIZE
uint32_t MULTI_PACKET_SIZE
Definition: usb.h:1439
USB_HOST_FNUM_Type
Definition: usb.h:393
USB_HOST_CTRLB_Type::L1RESUME
uint16_t L1RESUME
Definition: usb.h:194
USB_PADCAL_Type::TRANSP
uint16_t TRANSP
Definition: usb.h:801
USB_DEVICE_INTFLAG_Type::RAMACER
__I uint16_t RAMACER
Definition: usb.h:613
USB_DEVICE_EPINTENSET_Type::TRFAIL
uint8_t TRFAIL
Definition: usb.h:1323
USB_DEVICE_EPINTENSET_Type::TRCPT
uint8_t TRCPT
Definition: usb.h:1322
USB_CTRLA_Type::MODE
uint8_t MODE
Definition: usb.h:50
USB_HOST_INTENCLR_Type::RST
uint16_t RST
Definition: usb.h:483
USB_HOST_PINTENSET_Type::reg
uint8_t reg
Definition: usb.h:1376
USB_HOST_STATUS_BK_Type::CRCERR
uint8_t CRCERR
Definition: usb.h:1558
USB_SYNCBUSY_Type::SWRST
uint8_t SWRST
Definition: usb.h:77
UsbDevice::DESCADD
__IO USB_DESCADD_Type DESCADD
Offset: 0x024 (R/W 32) Descriptor Address.
Definition: usb.h:1713
UsbDeviceDescBank
UsbDeviceDescBank SRAM registers.
Definition: usb.h:1636
USB_DEVICE_EPSTATUS_Type::CURBK
uint8_t CURBK
Definition: usb.h:1054
USB_DEVICE_EPSTATUSCLR_Type::BK1RDY
uint8_t BK1RDY
Definition: usb.h:907
USB_HOST_INTFLAG_Type::DDISC
__I uint16_t DDISC
Definition: usb.h:659
UsbHost::PADCAL
__IO USB_PADCAL_Type PADCAL
Offset: 0x028 (R/W 16) USB PAD Calibration.
Definition: usb.h:1746
USB_HOST_CTRLB_Type::AUTORESUME
uint16_t AUTORESUME
Definition: usb.h:187
USB_HOST_CTRL_PIPE_Type::PDADDR
uint16_t PDADDR
Definition: usb.h:1578
USB_DEVICE_INTENCLR_Type::EORST
uint16_t EORST
Definition: usb.h:439
USB_FSMSTATUS_Type::reg
uint8_t reg
Definition: usb.h:339
USB_DEVICE_EPSTATUSCLR_Type::DTGLOUT
uint8_t DTGLOUT
Definition: usb.h:900
USB_HOST_PINTSMRY_Type::EPINT1
uint16_t EPINT1
Definition: usb.h:738
USB_DEVICE_EPSTATUS_Type
Definition: usb.h:1050
UsbDeviceDescriptor
USB_DEVICE Descriptor SRAM registers.
Definition: usb.h:1754
USB_HOST_PSTATUSSET_Type::BK1RDY
uint8_t BK1RDY
Definition: usb.h:1027
UsbHostDescBank::PCKSIZE
__IO USB_HOST_PCKSIZE_Type PCKSIZE
Offset: 0x004 (R/W 32) HOST_DESC_BANK Host Bank, Packet Size.
Definition: usb.h:1649
USB_DEVICE_EPINTENCLR_Type::STALL
uint8_t STALL
Definition: usb.h:1233
USB_HOST_INTENSET_Type::RAMACER
uint16_t RAMACER
Definition: usb.h:572
USB_DEVICE_EPINTENSET_Type::TRFAIL0
uint8_t TRFAIL0
Definition: usb.h:1314
USB_HOST_FNUM_Type::reg
uint16_t reg
Definition: usb.h:399
UsbDeviceEndpoint::EPSTATUS
__I USB_DEVICE_EPSTATUS_Type EPSTATUS
Offset: 0x006 (R/ 8) DEVICE_ENDPOINT End Point Pipe Status.
Definition: usb.h:1665
UsbHost::INTFLAG
__IO USB_HOST_INTFLAG_Type INTFLAG
Offset: 0x01C (R/W 16) HOST Host Interrupt Flag.
Definition: usb.h:1741
USB_HOST_INTENSET_Type::DDISC
uint16_t DDISC
Definition: usb.h:574
USB_HOST_INTFLAG_Type::RST
__I uint16_t RST
Definition: usb.h:653
USB_DEVICE_INTFLAG_Type::LPMSUSP
__I uint16_t LPMSUSP
Definition: usb.h:615
USB_DEVICE_INTFLAG_Type::EORSM
__I uint16_t EORSM
Definition: usb.h:611
USB_HOST_PSTATUS_Type::reg
uint8_t reg
Definition: usb.h:1105
USB_HOST_INTENCLR_Type::WAKEUP
uint16_t WAKEUP
Definition: usb.h:484
USB_DEVICE_INTENSET_Type::MSOF
uint16_t MSOF
Definition: usb.h:522
UsbDevice::STATUS
__I USB_DEVICE_STATUS_Type STATUS
Offset: 0x00C (R/ 8) DEVICE Status.
Definition: usb.h:1700
UsbHostPipe::PINTENCLR
__IO USB_HOST_PINTENCLR_Type PINTENCLR
Offset: 0x008 (R/W 8) HOST_PIPE Pipe Interrupt Flag Clear.
Definition: usb.h:1683
USB_HOST_INTENSET_Type::DCONN
uint16_t DCONN
Definition: usb.h:573
USB_HOST_PCKSIZE_Type::AUTO_ZLP
uint32_t AUTO_ZLP
Definition: usb.h:1469
USB_DEVICE_EPINTENCLR_Type::RXSTP
uint8_t RXSTP
Definition: usb.h:1224
USB_DEVICE_EPSTATUSSET_Type::BK0RDY
uint8_t BK0RDY
Definition: usb.h:982
USB_HOST_PSTATUSSET_Type::PFREEZE
uint8_t PFREEZE
Definition: usb.h:1024
USB_DEVICE_EPSTATUS_Type::reg
uint8_t reg
Definition: usb.h:1066
USB_HOST_PCKSIZE_Type::MULTI_PACKET_SIZE
uint32_t MULTI_PACKET_SIZE
Definition: usb.h:1467
USB_HOST_PINTENSET_Type::PERR
uint8_t PERR
Definition: usb.h:1367
USB_HOST_PSTATUS_Type::BK1RDY
uint8_t BK1RDY
Definition: usb.h:1103
USB_HOST_PINTSMRY_Type::EPINT6
uint16_t EPINT6
Definition: usb.h:743
USB_HOST_PINTENCLR_Type
Definition: usb.h:1270
UsbHostDescBank::CTRL_PIPE
__IO USB_HOST_CTRL_PIPE_Type CTRL_PIPE
Offset: 0x00C (R/W 16) HOST_DESC_BANK Host Bank, Host Control Pipe.
Definition: usb.h:1653
USB_DEVICE_INTENSET_Type::UPRSM
uint16_t UPRSM
Definition: usb.h:527
USB_HOST_PINTSMRY_Type::EPINT
uint16_t EPINT
Definition: usb.h:748
USB_HOST_HSOFC_Type::FLENCE
uint8_t FLENCE
Definition: usb.h:256
USB_DEVICE_INTENSET_Type::WAKEUP
uint16_t WAKEUP
Definition: usb.h:525
USB_SYNCBUSY_Type::ENABLE
uint8_t ENABLE
Definition: usb.h:78
USB_DEVICE_EPSTATUS_Type::STALLRQ
uint8_t STALLRQ
Definition: usb.h:1063
USB_DEVICE_EPCFG_Type::NYETDIS
uint8_t NYETDIS
Definition: usb.h:833
UsbHostPipe::PINTENSET
__IO USB_HOST_PINTENSET_Type PINTENSET
Offset: 0x009 (R/W 8) HOST_PIPE Pipe Interrupt Flag Set.
Definition: usb.h:1684
USB_DEVICE_INTENCLR_Type
Definition: usb.h:434
USB_HOST_PSTATUS_Type
Definition: usb.h:1094
USB_DEVICE_EPSTATUSCLR_Type::STALLRQ
uint8_t STALLRQ
Definition: usb.h:911
USB_DEVICE_EPSTATUS_Type::BK0RDY
uint8_t BK0RDY
Definition: usb.h:1058
USB_QOSCTRL_Type
Definition: usb.h:96
USB_DEVICE_INTENCLR_Type::UPRSM
uint16_t UPRSM
Definition: usb.h:442
USB_DEVICE_INTENCLR_Type::reg
uint16_t reg
Definition: usb.h:448
USB_DEVICE_EPINTFLAG_Type
Definition: usb.h:1126
USB_DEVICE_FNUM_Type
Definition: usb.h:367
USB_DEVICE_INTENCLR_Type::LPMSUSP
uint16_t LPMSUSP
Definition: usb.h:445
USB_HOST_PINTENCLR_Type::STALL
uint8_t STALL
Definition: usb.h:1277
USB_DEVICE_EXTREG_Type::SUBPID
uint16_t SUBPID
Definition: usb.h:1494
USB_DESCADD_Type::reg
uint32_t reg
Definition: usb.h:785
USB_DEVICE_EXTREG_Type::reg
uint16_t reg
Definition: usb.h:1498
USB_HOST_PINTFLAG_Type::PERR
__I uint8_t PERR
Definition: usb.h:1183
USB_HOST_PINTSMRY_Type::EPINT2
uint16_t EPINT2
Definition: usb.h:739
UsbHost::STATUS
__IO USB_HOST_STATUS_Type STATUS
Offset: 0x00C (R/W 8) HOST Status.
Definition: usb.h:1731
USB_DEVICE_EPINTSMRY_Type::EPINT6
uint16_t EPINT6
Definition: usb.h:697
UsbDevice::SYNCBUSY
__I USB_SYNCBUSY_Type SYNCBUSY
Offset: 0x002 (R/ 8) Synchronization Busy.
Definition: usb.h:1694
USB_HOST_PSTATUSCLR_Type::DTGL
uint8_t DTGL
Definition: usb.h:944
USB_DEVICE_INTENCLR_Type::LPMNYET
uint16_t LPMNYET
Definition: usb.h:444
USB_DEVICE_PCKSIZE_Type::AUTO_ZLP
uint32_t AUTO_ZLP
Definition: usb.h:1441
UsbDeviceEndpoint::EPCFG
__IO USB_DEVICE_EPCFG_Type EPCFG
Offset: 0x000 (R/W 8) DEVICE_ENDPOINT End Point Configuration.
Definition: usb.h:1661
USB_DEVICE_EPINTENCLR_Type
Definition: usb.h:1218
USB_DEVICE_INTFLAG_Type::EORST
__I uint16_t EORST
Definition: usb.h:609
UsbHostDescBank::ADDR
__IO USB_HOST_ADDR_Type ADDR
Offset: 0x000 (R/W 32) HOST_DESC_BANK Host Bank, Adress of Data Buffer.
Definition: usb.h:1648
UsbHostDescBank::STATUS_PIPE
__IO USB_HOST_STATUS_PIPE_Type STATUS_PIPE
Offset: 0x00E (R/W 16) HOST_DESC_BANK Host Bank, Host Status Pipe.
Definition: usb.h:1654
UsbHostPipe::PCFG
__IO USB_HOST_PCFG_Type PCFG
Offset: 0x000 (R/W 8) HOST_PIPE End Point Configuration.
Definition: usb.h:1676
USB_DEVICE_EPINTENCLR_Type::STALL1
uint8_t STALL1
Definition: usb.h:1226
USB_DEVICE_ADDR_Type::ADDR
uint32_t ADDR
Definition: usb.h:1404
USB_HOST_PSTATUSSET_Type::reg
uint8_t reg
Definition: usb.h:1029
USB_HOST_CTRLB_Type::SOFE
uint16_t SOFE
Definition: usb.h:191
USB_HOST_INTENSET_Type::UPRSM
uint16_t UPRSM
Definition: usb.h:571
USB_DEVICE_EPINTENSET_Type::TRFAIL1
uint8_t TRFAIL1
Definition: usb.h:1315
UsbDevice::DADD
__IO USB_DEVICE_DADD_Type DADD
Offset: 0x00A (R/W 8) DEVICE Device Address.
Definition: usb.h:1698
USB_DEVICE_FNUM_Type::reg
uint16_t reg
Definition: usb.h:374
USB_HOST_PINTFLAG_Type::TRFAIL
__I uint8_t TRFAIL
Definition: usb.h:1182
USB_DEVICE_EPINTENCLR_Type::TRCPT
uint8_t TRCPT
Definition: usb.h:1230
USB_DEVICE_EPINTFLAG_Type::uint8_t
__I uint8_t
Definition: usb.h:1135
USB_HOST_CTRL_PIPE_Type
Definition: usb.h:1576
USB_HOST_STATUS_PIPE_Type::TOUTER
uint16_t TOUTER
Definition: usb.h:1608
USB_DEVICE_INTENSET_Type::reg
uint16_t reg
Definition: usb.h:533
USB_HOST_PINTFLAG_Type::reg
uint8_t reg
Definition: usb.h:1192
USB_DEVICE_EPINTENSET_Type::reg
uint8_t reg
Definition: usb.h:1328
USB_PADCAL_Type::reg
uint16_t reg
Definition: usb.h:808
USB_QOSCTRL_Type::reg
uint8_t reg
Definition: usb.h:102
USB_FSMSTATUS_Type
Definition: usb.h:334
USB_HOST_PINTENCLR_Type::TRCPT
uint8_t TRCPT
Definition: usb.h:1281
UsbHost::FSMSTATUS
__I USB_FSMSTATUS_Type FSMSTATUS
Offset: 0x00D (R/ 8) Finite State Machine Status.
Definition: usb.h:1732
UsbDeviceDescBank::EXTREG
__IO USB_DEVICE_EXTREG_Type EXTREG
Offset: 0x008 (R/W 16) DEVICE_DESC_BANK Endpoint Bank, Extended.
Definition: usb.h:1639
USB_HOST_CTRLB_Type::reg
uint16_t reg
Definition: usb.h:197
USB_DEVICE_INTFLAG_Type::UPRSM
__I uint16_t UPRSM
Definition: usb.h:612
USB_DEVICE_EPSTATUSCLR_Type::BK0RDY
uint8_t BK0RDY
Definition: usb.h:906
USB_HOST_HSOFC_Type
Definition: usb.h:252
USB_DEVICE_INTFLAG_Type::uint16_t
__I uint16_t
Definition: usb.h:616
USB_HOST_ADDR_Type::reg
uint32_t reg
Definition: usb.h:1423
USB_HOST_PCKSIZE_Type::SIZE
uint32_t SIZE
Definition: usb.h:1468
USB_DEVICE_CTRLB_Type::UPRSM
uint16_t UPRSM
Definition: usb.h:122
USB_DEVICE_STATUS_Type::reg
uint8_t reg
Definition: usb.h:281
USB_HOST_EXTREG_Type::SUBPID
uint16_t SUBPID
Definition: usb.h:1516
USB_HOST_PCFG_Type::PTYPE
uint8_t PTYPE
Definition: usb.h:858
USB_DEVICE_STATUS_Type::LINESTATE
uint8_t LINESTATE
Definition: usb.h:279
UsbDeviceDescBank::PCKSIZE
__IO USB_DEVICE_PCKSIZE_Type PCKSIZE
Offset: 0x004 (R/W 32) DEVICE_DESC_BANK Endpoint Bank, Packet Size.
Definition: usb.h:1638
USB_DEVICE_EPINTFLAG_Type::RXSTP
__I uint8_t RXSTP
Definition: usb.h:1132
USB_DEVICE_DADD_Type
Definition: usb.h:231
USB_DEVICE_EPINTFLAG_Type::TRFAIL1
__I uint8_t TRFAIL1
Definition: usb.h:1131
USB_HOST_PINTFLAG_Type::TRCPT0
__I uint8_t TRCPT0
Definition: usb.h:1180
USB_DEVICE_EPINTENCLR_Type::reg
uint8_t reg
Definition: usb.h:1236
UsbHost::DESCADD
__IO USB_DESCADD_Type DESCADD
Offset: 0x024 (R/W 32) Descriptor Address.
Definition: usb.h:1745
USB_DEVICE_CTRLB_Type::TSTJ
uint16_t TSTJ
Definition: usb.h:125
USB_HOST_CTRL_PIPE_Type::PERMAX
uint16_t PERMAX
Definition: usb.h:1581
USB_HOST_INTENSET_Type::RST
uint16_t RST
Definition: usb.h:568
USB_SYNCBUSY_Type::reg
uint8_t reg
Definition: usb.h:81
UsbDeviceEndpoint::EPINTENSET
__IO USB_DEVICE_EPINTENSET_Type EPINTENSET
Offset: 0x009 (R/W 8) DEVICE_ENDPOINT End Point Interrupt Set Flag.
Definition: usb.h:1668
USB_HOST_CTRLB_Type::TSTK
uint16_t TSTK
Definition: usb.h:189
UsbHostDescBank::STATUS_BK
__IO USB_HOST_STATUS_BK_Type STATUS_BK
Offset: 0x00A (R/W 8) HOST_DESC_BANK Host Bank, Status of Bank.
Definition: usb.h:1651
USB_DEVICE_INTENCLR_Type::SOF
uint16_t SOF
Definition: usb.h:438
USB_CTRLA_Type::SWRST
uint8_t SWRST
Definition: usb.h:46
USB_DEVICE_EPINTSMRY_Type::EPINT1
uint16_t EPINT1
Definition: usb.h:692
USB_HOST_ADDR_Type
Definition: usb.h:1419
USB_DEVICE_EPSTATUSSET_Type
Definition: usb.h:974
USB_HOST_INTFLAG_Type::reg
uint16_t reg
Definition: usb.h:662
USB_DEVICE_EPSTATUSCLR_Type::STALLRQ0
uint8_t STALLRQ0
Definition: usb.h:904
USB_HOST_EXTREG_Type::VARIABLE
uint16_t VARIABLE
Definition: usb.h:1517
USB_DESCADD_Type
Definition: usb.h:781
USB_HOST_CTRLB_Type
Definition: usb.h:182
USB_DEVICE_EPSTATUSSET_Type::STALLRQ0
uint8_t STALLRQ0
Definition: usb.h:980
USB_HOST_ADDR_Type::ADDR
uint32_t ADDR
Definition: usb.h:1421
USB_HOST_STATUS_PIPE_Type::ERCNT
uint16_t ERCNT
Definition: usb.h:1610
USB_HOST_STATUS_Type::SPEED
uint8_t SPEED
Definition: usb.h:313
USB_DEVICE_EPINTENSET_Type::STALL
uint8_t STALL
Definition: usb.h:1325
USB_HOST_INTFLAG_Type::DNRSM
__I uint16_t DNRSM
Definition: usb.h:655
USB_HOST_STATUS_Type::LINESTATE
uint8_t LINESTATE
Definition: usb.h:315
UsbDevice::QOSCTRL
__IO USB_QOSCTRL_Type QOSCTRL
Offset: 0x003 (R/W 8) USB Quality Of Service.
Definition: usb.h:1695
USB_DEVICE_EPSTATUS_Type::DTGLIN
uint8_t DTGLIN
Definition: usb.h:1053
USB_DEVICE_EPCFG_Type::EPTYPE0
uint8_t EPTYPE0
Definition: usb.h:830
USB_HOST_PINTFLAG_Type::TRCPT
__I uint8_t TRCPT
Definition: usb.h:1189
UsbHostPipe::BINTERVAL
__IO USB_HOST_BINTERVAL_Type BINTERVAL
Offset: 0x003 (R/W 8) HOST_PIPE Bus Access Period of Pipe.
Definition: usb.h:1678
USB_DEVICE_EPSTATUS_Type::DTGLOUT
uint8_t DTGLOUT
Definition: usb.h:1052
USB_HOST_PINTFLAG_Type::uint8_t
__I uint8_t
Definition: usb.h:1186
USB_HOST_STATUS_Type
Definition: usb.h:310
USB_DEVICE_EPINTFLAG_Type::STALL0
__I uint8_t STALL0
Definition: usb.h:1133
USB_HOST_FLENHIGH_Type
Definition: usb.h:416
USB_DEVICE_EPINTSMRY_Type::EPINT4
uint16_t EPINT4
Definition: usb.h:695
USB_HOST_PINTENCLR_Type::TRFAIL
uint8_t TRFAIL
Definition: usb.h:1274
UsbHost
USB_HOST hardware registers.
Definition: usb.h:1722
USB_HOST_CTRLB_Type::TSTJ
uint16_t TSTJ
Definition: usb.h:188
USB_DEVICE_CTRLB_Type
Definition: usb.h:119
USB_HOST_INTENSET_Type::DNRSM
uint16_t DNRSM
Definition: usb.h:570
USB_DEVICE_PCKSIZE_Type::SIZE
uint32_t SIZE
Definition: usb.h:1440
USB_HOST_STATUS_PIPE_Type::CRC16ER
uint16_t CRC16ER
Definition: usb.h:1609
USB_DEVICE_EPINTSMRY_Type::EPINT7
uint16_t EPINT7
Definition: usb.h:698
USB_DEVICE_EPINTFLAG_Type::TRCPT
__I uint8_t TRCPT
Definition: usb.h:1138
USB_DEVICE_EPINTFLAG_Type::TRFAIL0
__I uint8_t TRFAIL0
Definition: usb.h:1130
USB_CTRLA_Type::RUNSTDBY
uint8_t RUNSTDBY
Definition: usb.h:48
USB_HOST_HSOFC_Type::reg
uint8_t reg
Definition: usb.h:258
USB_HOST_PINTENCLR_Type::PERR
uint8_t PERR
Definition: usb.h:1275
USB_HOST_EXTREG_Type::reg
uint16_t reg
Definition: usb.h:1520
USB_FSMSTATUS_Type::FSMSTATE
uint8_t FSMSTATE
Definition: usb.h:336
USB_HOST_PINTENSET_Type::STALL
uint8_t STALL
Definition: usb.h:1369
USB_HOST_INTENSET_Type::reg
uint16_t reg
Definition: usb.h:577
USB_DEVICE_DADD_Type::reg
uint8_t reg
Definition: usb.h:236
USB_HOST_PINTFLAG_Type::TXSTP
__I uint8_t TXSTP
Definition: usb.h:1184
USB_HOST_PSTATUSCLR_Type::reg
uint8_t reg
Definition: usb.h:953
USB_HOST_PINTENSET_Type
Definition: usb.h:1362
USB_DEVICE_INTENSET_Type::SUSPEND
uint16_t SUSPEND
Definition: usb.h:521
USB_DEVICE_CTRLB_Type::LPMHDSK
uint16_t LPMHDSK
Definition: usb.h:130
RoReg8
volatile const uint8_t RoReg8
Definition: same54n19a.h:53
UsbHostDescBank
UsbHostDescBank SRAM registers.
Definition: usb.h:1647
UsbDevice::FSMSTATUS
__I USB_FSMSTATUS_Type FSMSTATUS
Offset: 0x00D (R/ 8) Finite State Machine Status.
Definition: usb.h:1701
UsbHost::SYNCBUSY
__I USB_SYNCBUSY_Type SYNCBUSY
Offset: 0x002 (R/ 8) Synchronization Busy.
Definition: usb.h:1725
USB_DEVICE_EPSTATUS_Type::STALLRQ1
uint8_t STALLRQ1
Definition: usb.h:1057
USB_HOST_INTENCLR_Type::RAMACER
uint16_t RAMACER
Definition: usb.h:487
USB_QOSCTRL_Type::DQOS
uint8_t DQOS
Definition: usb.h:99
USB_DEVICE_EPINTSMRY_Type
Definition: usb.h:689
UsbDeviceDescBank::STATUS_BK
__IO USB_DEVICE_STATUS_BK_Type STATUS_BK
Offset: 0x00A (R/W 8) DEVICE_DESC_BANK Enpoint Bank, Status of Bank.
Definition: usb.h:1640
USB_HOST_CTRL_PIPE_Type::reg
uint16_t reg
Definition: usb.h:1583
USB_HOST_PINTSMRY_Type
Definition: usb.h:735
USB_DEVICE_EPCFG_Type::reg
uint8_t reg
Definition: usb.h:835
USB_HOST_PSTATUSSET_Type::DTGL
uint8_t DTGL
Definition: usb.h:1020
USB_DEVICE_INTFLAG_Type::SUSPEND
__I uint16_t SUSPEND
Definition: usb.h:606
USB_DEVICE_EPINTFLAG_Type::STALL
__I uint8_t STALL
Definition: usb.h:1141
USB_DEVICE_EPINTENSET_Type::TRCPT0
uint8_t TRCPT0
Definition: usb.h:1312
USB_DEVICE_EPCFG_Type::EPTYPE1
uint8_t EPTYPE1
Definition: usb.h:832
USB_DEVICE_EPINTENSET_Type::STALL1
uint8_t STALL1
Definition: usb.h:1318
USB_DEVICE_CTRLB_Type::OPMODE2
uint16_t OPMODE2
Definition: usb.h:128
USB_DEVICE_ADDR_Type
Definition: usb.h:1402
USB_DEVICE_INTENSET_Type::LPMSUSP
uint16_t LPMSUSP
Definition: usb.h:530
USB_HOST_INTENCLR_Type::DNRSM
uint16_t DNRSM
Definition: usb.h:485
USB_CTRLA_Type::ENABLE
uint8_t ENABLE
Definition: usb.h:47
USB_DEVICE_EPINTSMRY_Type::EPINT3
uint16_t EPINT3
Definition: usb.h:694
UsbHostPipe
UsbHostPipe hardware registers.
Definition: usb.h:1675
USB_DEVICE_EPINTENSET_Type::TRCPT1
uint8_t TRCPT1
Definition: usb.h:1313
USB_DEVICE_EPINTENSET_Type::RXSTP
uint8_t RXSTP
Definition: usb.h:1316
USB_HOST_PINTENSET_Type::TXSTP
uint8_t TXSTP
Definition: usb.h:1368
USB_DEVICE_INTENSET_Type::EORSM
uint16_t EORSM
Definition: usb.h:526
UsbHost::INTENCLR
__IO USB_HOST_INTENCLR_Type INTENCLR
Offset: 0x014 (R/W 16) HOST Host Interrupt Enable Clear.
Definition: usb.h:1737
USB_DEVICE_EPINTFLAG_Type::TRCPT0
__I uint8_t TRCPT0
Definition: usb.h:1128
USB_DEVICE_EPCFG_Type
Definition: usb.h:828
USB_HOST_PSTATUSSET_Type::BK0RDY
uint8_t BK0RDY
Definition: usb.h:1026
UsbHost::CTRLB
__IO USB_HOST_CTRLB_Type CTRLB
Offset: 0x008 (R/W 16) HOST Control B.
Definition: usb.h:1728
USB_HOST_PINTSMRY_Type::EPINT0
uint16_t EPINT0
Definition: usb.h:737
USB_HOST_STATUS_PIPE_Type::DAPIDER
uint16_t DAPIDER
Definition: usb.h:1606
USB_HOST_STATUS_PIPE_Type
Definition: usb.h:1603
USB_HOST_INTFLAG_Type::DCONN
__I uint16_t DCONN
Definition: usb.h:658
USB_SYNCBUSY_Type
Definition: usb.h:75
USB_DEVICE_EPSTATUS_Type::STALLRQ0
uint8_t STALLRQ0
Definition: usb.h:1056
USB_HOST_PINTENSET_Type::TRCPT0
uint8_t TRCPT0
Definition: usb.h:1364
USB_HOST_FNUM_Type::MFNUM
uint16_t MFNUM
Definition: usb.h:395
USB_DEVICE_CTRLB_Type::GNAK
uint16_t GNAK
Definition: usb.h:129
USB_HOST_INTFLAG_Type::WAKEUP
__I uint16_t WAKEUP
Definition: usb.h:654
USB_HOST_STATUS_BK_Type::reg
uint8_t reg
Definition: usb.h:1562
Usb
Definition: usb.h:1769
UsbDevice::PADCAL
__IO USB_PADCAL_Type PADCAL
Offset: 0x028 (R/W 16) USB PAD Calibration.
Definition: usb.h:1714
USB_HOST_EXTREG_Type
Definition: usb.h:1514
UsbHostPipe::PSTATUSSET
__O USB_HOST_PSTATUSSET_Type PSTATUSSET
Offset: 0x005 ( /W 8) HOST_PIPE End Point Pipe Status Set.
Definition: usb.h:1680
USB_HOST_PSTATUSCLR_Type::CURBK
uint8_t CURBK
Definition: usb.h:946
USB_DEVICE_STATUS_BK_Type
Definition: usb.h:1536
USB_HOST_PCKSIZE_Type
Definition: usb.h:1464
USB_HOST_STATUS_PIPE_Type::reg
uint16_t reg
Definition: usb.h:1613
USB_HOST_INTENSET_Type::HSOF
uint16_t HSOF
Definition: usb.h:567
USB_DEVICE_ADDR_Type::reg
uint32_t reg
Definition: usb.h:1406
UsbDeviceDescBank::ADDR
__IO USB_DEVICE_ADDR_Type ADDR
Offset: 0x000 (R/W 32) DEVICE_DESC_BANK Endpoint Bank, Adress of Data Buffer.
Definition: usb.h:1637
USB_HOST_INTENCLR_Type::HSOF
uint16_t HSOF
Definition: usb.h:482
USB_HOST_STATUS_BK_Type
Definition: usb.h:1556
USB_DEVICE_INTFLAG_Type::WAKEUP
__I uint16_t WAKEUP
Definition: usb.h:610
USB_DEVICE_STATUS_Type::SPEED
uint8_t SPEED
Definition: usb.h:277
USB_DEVICE_EXTREG_Type::VARIABLE
uint16_t VARIABLE
Definition: usb.h:1495
UsbHost::CTRLA
__IO USB_CTRLA_Type CTRLA
Offset: 0x000 (R/W 8) Control A.
Definition: usb.h:1723
USB_DEVICE_EPINTFLAG_Type::TRFAIL
__I uint8_t TRFAIL
Definition: usb.h:1139
USB_DEVICE_EPINTFLAG_Type::STALL1
__I uint8_t STALL1
Definition: usb.h:1134
USB_HOST_PINTFLAG_Type::STALL
__I uint8_t STALL
Definition: usb.h:1185
Usb::HOST
UsbHost HOST
Offset: 0x000 USB is Host.
Definition: usb.h:1771
USB_DEVICE_EPINTENSET_Type
Definition: usb.h:1310
USB_HOST_PSTATUSSET_Type
Definition: usb.h:1018