Definition at line 152 of file oscctrl.h.
◆ __pad0__
uint32_t OSCCTRL_INTENSET_Type::__pad0__ |
bit: 4.. 7 Reserved
bit: 4..31 Reserved
Definition at line 158 of file oscctrl.h.
◆ __pad1__
uint32_t OSCCTRL_INTENSET_Type::__pad1__ |
bit: 13..15 Reserved
Definition at line 164 of file oscctrl.h.
◆ __pad2__
uint32_t OSCCTRL_INTENSET_Type::__pad2__ |
bit: 20..23 Reserved
Definition at line 169 of file oscctrl.h.
◆ __pad3__
uint32_t OSCCTRL_INTENSET_Type::__pad3__ |
bit: 28..31 Reserved
Definition at line 174 of file oscctrl.h.
◆ bit
struct { ... } OSCCTRL_INTENSET_Type::bit |
Structure used for bit access
◆ DFLLLCKC
uint32_t OSCCTRL_INTENSET_Type::DFLLLCKC |
bit: 11 DFLL Lock Coarse Interrupt Enable
Definition at line 162 of file oscctrl.h.
◆ DFLLLCKF
uint32_t OSCCTRL_INTENSET_Type::DFLLLCKF |
bit: 10 DFLL Lock Fine Interrupt Enable
Definition at line 161 of file oscctrl.h.
◆ DFLLOOB
uint32_t OSCCTRL_INTENSET_Type::DFLLOOB |
bit: 9 DFLL Out Of Bounds Interrupt Enable
Definition at line 160 of file oscctrl.h.
◆ DFLLRCS
uint32_t OSCCTRL_INTENSET_Type::DFLLRCS |
bit: 12 DFLL Reference Clock Stopped Interrupt Enable
Definition at line 163 of file oscctrl.h.
◆ DFLLRDY
uint32_t OSCCTRL_INTENSET_Type::DFLLRDY |
bit: 8 DFLL Ready Interrupt Enable
Definition at line 159 of file oscctrl.h.
◆ DPLL0LCKF
uint32_t OSCCTRL_INTENSET_Type::DPLL0LCKF |
bit: 17 DPLL0 Lock Fall Interrupt Enable
Definition at line 166 of file oscctrl.h.
◆ DPLL0LCKR
uint32_t OSCCTRL_INTENSET_Type::DPLL0LCKR |
bit: 16 DPLL0 Lock Rise Interrupt Enable
Definition at line 165 of file oscctrl.h.
◆ DPLL0LDRTO
uint32_t OSCCTRL_INTENSET_Type::DPLL0LDRTO |
bit: 19 DPLL0 Loop Divider Ratio Update Complete Interrupt Enable
Definition at line 168 of file oscctrl.h.
◆ DPLL0LTO
uint32_t OSCCTRL_INTENSET_Type::DPLL0LTO |
bit: 18 DPLL0 Lock Timeout Interrupt Enable
Definition at line 167 of file oscctrl.h.
◆ DPLL1LCKF
uint32_t OSCCTRL_INTENSET_Type::DPLL1LCKF |
bit: 25 DPLL1 Lock Fall Interrupt Enable
Definition at line 171 of file oscctrl.h.
◆ DPLL1LCKR
uint32_t OSCCTRL_INTENSET_Type::DPLL1LCKR |
bit: 24 DPLL1 Lock Rise Interrupt Enable
Definition at line 170 of file oscctrl.h.
◆ DPLL1LDRTO
uint32_t OSCCTRL_INTENSET_Type::DPLL1LDRTO |
bit: 27 DPLL1 Loop Divider Ratio Update Complete Interrupt Enable
Definition at line 173 of file oscctrl.h.
◆ DPLL1LTO
uint32_t OSCCTRL_INTENSET_Type::DPLL1LTO |
bit: 26 DPLL1 Lock Timeout Interrupt Enable
Definition at line 172 of file oscctrl.h.
◆ reg
uint32_t OSCCTRL_INTENSET_Type::reg |
Type used for register access
Definition at line 181 of file oscctrl.h.
◆ vec
struct { ... } OSCCTRL_INTENSET_Type::vec |
Structure used for vec access
◆ XOSCFAIL
uint32_t OSCCTRL_INTENSET_Type::XOSCFAIL |
bit: 2.. 3 XOSC x Clock Failure Detector Interrupt Enable
Definition at line 178 of file oscctrl.h.
◆ XOSCFAIL0
uint32_t OSCCTRL_INTENSET_Type::XOSCFAIL0 |
bit: 2 XOSC 0 Clock Failure Detector Interrupt Enable
Definition at line 156 of file oscctrl.h.
◆ XOSCFAIL1
uint32_t OSCCTRL_INTENSET_Type::XOSCFAIL1 |
bit: 3 XOSC 1 Clock Failure Detector Interrupt Enable
Definition at line 157 of file oscctrl.h.
◆ XOSCRDY
uint32_t OSCCTRL_INTENSET_Type::XOSCRDY |
bit: 0.. 1 XOSC x Ready Interrupt Enable
Definition at line 177 of file oscctrl.h.
◆ XOSCRDY0
uint32_t OSCCTRL_INTENSET_Type::XOSCRDY0 |
bit: 0 XOSC 0 Ready Interrupt Enable
Definition at line 154 of file oscctrl.h.
◆ XOSCRDY1
uint32_t OSCCTRL_INTENSET_Type::XOSCRDY1 |
bit: 1 XOSC 1 Ready Interrupt Enable
Definition at line 155 of file oscctrl.h.
The documentation for this union was generated from the following file:
- /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/oscctrl.h