SAME54P20A Test Project
qspi.h
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1 
30 #ifndef _SAME54_QSPI_INSTANCE_
31 #define _SAME54_QSPI_INSTANCE_
32 
33 /* ========== Register definition for QSPI peripheral ========== */
34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
35 #define REG_QSPI_CTRLA (0x42003400)
36 #define REG_QSPI_CTRLB (0x42003404)
37 #define REG_QSPI_BAUD (0x42003408)
38 #define REG_QSPI_RXDATA (0x4200340C)
39 #define REG_QSPI_TXDATA (0x42003410)
40 #define REG_QSPI_INTENCLR (0x42003414)
41 #define REG_QSPI_INTENSET (0x42003418)
42 #define REG_QSPI_INTFLAG (0x4200341C)
43 #define REG_QSPI_STATUS (0x42003420)
44 #define REG_QSPI_INSTRADDR (0x42003430)
45 #define REG_QSPI_INSTRCTRL (0x42003434)
46 #define REG_QSPI_INSTRFRAME (0x42003438)
47 #define REG_QSPI_SCRAMBCTRL (0x42003440)
48 #define REG_QSPI_SCRAMBKEY (0x42003444)
49 #else
50 #define REG_QSPI_CTRLA (*(RwReg *)0x42003400UL)
51 #define REG_QSPI_CTRLB (*(RwReg *)0x42003404UL)
52 #define REG_QSPI_BAUD (*(RwReg *)0x42003408UL)
53 #define REG_QSPI_RXDATA (*(RoReg *)0x4200340CUL)
54 #define REG_QSPI_TXDATA (*(WoReg *)0x42003410UL)
55 #define REG_QSPI_INTENCLR (*(RwReg *)0x42003414UL)
56 #define REG_QSPI_INTENSET (*(RwReg *)0x42003418UL)
57 #define REG_QSPI_INTFLAG (*(RwReg *)0x4200341CUL)
58 #define REG_QSPI_STATUS (*(RoReg *)0x42003420UL)
59 #define REG_QSPI_INSTRADDR (*(RwReg *)0x42003430UL)
60 #define REG_QSPI_INSTRCTRL (*(RwReg *)0x42003434UL)
61 #define REG_QSPI_INSTRFRAME (*(RwReg *)0x42003438UL)
62 #define REG_QSPI_SCRAMBCTRL (*(RwReg *)0x42003440UL)
63 #define REG_QSPI_SCRAMBKEY (*(WoReg *)0x42003444UL)
64 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
65 
66 /* ========== Instance parameters for QSPI peripheral ========== */
67 #define QSPI_DMAC_ID_RX 83
68 #define QSPI_DMAC_ID_TX 84
69 #define QSPI_HADDR_MSB 23
70 #define QSPI_OCMS 1
71 
72 #endif /* _SAME54_QSPI_INSTANCE_ */