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30 #ifndef _SAME54_WDT_COMPONENT_
31 #define _SAME54_WDT_COMPONENT_
43 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
56 #define WDT_CTRLA_OFFSET 0x0
57 #define WDT_CTRLA_RESETVALUE _U_(0x00)
59 #define WDT_CTRLA_ENABLE_Pos 1
60 #define WDT_CTRLA_ENABLE (_U_(0x1) << WDT_CTRLA_ENABLE_Pos)
61 #define WDT_CTRLA_WEN_Pos 2
62 #define WDT_CTRLA_WEN (_U_(0x1) << WDT_CTRLA_WEN_Pos)
63 #define WDT_CTRLA_ALWAYSON_Pos 7
64 #define WDT_CTRLA_ALWAYSON (_U_(0x1) << WDT_CTRLA_ALWAYSON_Pos)
65 #define WDT_CTRLA_MASK _U_(0x86)
68 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
78 #define WDT_CONFIG_OFFSET 0x1
79 #define WDT_CONFIG_RESETVALUE _U_(0xBB)
81 #define WDT_CONFIG_PER_Pos 0
82 #define WDT_CONFIG_PER_Msk (_U_(0xF) << WDT_CONFIG_PER_Pos)
83 #define WDT_CONFIG_PER(value) (WDT_CONFIG_PER_Msk & ((value) << WDT_CONFIG_PER_Pos))
84 #define WDT_CONFIG_PER_CYC8_Val _U_(0x0)
85 #define WDT_CONFIG_PER_CYC16_Val _U_(0x1)
86 #define WDT_CONFIG_PER_CYC32_Val _U_(0x2)
87 #define WDT_CONFIG_PER_CYC64_Val _U_(0x3)
88 #define WDT_CONFIG_PER_CYC128_Val _U_(0x4)
89 #define WDT_CONFIG_PER_CYC256_Val _U_(0x5)
90 #define WDT_CONFIG_PER_CYC512_Val _U_(0x6)
91 #define WDT_CONFIG_PER_CYC1024_Val _U_(0x7)
92 #define WDT_CONFIG_PER_CYC2048_Val _U_(0x8)
93 #define WDT_CONFIG_PER_CYC4096_Val _U_(0x9)
94 #define WDT_CONFIG_PER_CYC8192_Val _U_(0xA)
95 #define WDT_CONFIG_PER_CYC16384_Val _U_(0xB)
96 #define WDT_CONFIG_PER_CYC8 (WDT_CONFIG_PER_CYC8_Val << WDT_CONFIG_PER_Pos)
97 #define WDT_CONFIG_PER_CYC16 (WDT_CONFIG_PER_CYC16_Val << WDT_CONFIG_PER_Pos)
98 #define WDT_CONFIG_PER_CYC32 (WDT_CONFIG_PER_CYC32_Val << WDT_CONFIG_PER_Pos)
99 #define WDT_CONFIG_PER_CYC64 (WDT_CONFIG_PER_CYC64_Val << WDT_CONFIG_PER_Pos)
100 #define WDT_CONFIG_PER_CYC128 (WDT_CONFIG_PER_CYC128_Val << WDT_CONFIG_PER_Pos)
101 #define WDT_CONFIG_PER_CYC256 (WDT_CONFIG_PER_CYC256_Val << WDT_CONFIG_PER_Pos)
102 #define WDT_CONFIG_PER_CYC512 (WDT_CONFIG_PER_CYC512_Val << WDT_CONFIG_PER_Pos)
103 #define WDT_CONFIG_PER_CYC1024 (WDT_CONFIG_PER_CYC1024_Val << WDT_CONFIG_PER_Pos)
104 #define WDT_CONFIG_PER_CYC2048 (WDT_CONFIG_PER_CYC2048_Val << WDT_CONFIG_PER_Pos)
105 #define WDT_CONFIG_PER_CYC4096 (WDT_CONFIG_PER_CYC4096_Val << WDT_CONFIG_PER_Pos)
106 #define WDT_CONFIG_PER_CYC8192 (WDT_CONFIG_PER_CYC8192_Val << WDT_CONFIG_PER_Pos)
107 #define WDT_CONFIG_PER_CYC16384 (WDT_CONFIG_PER_CYC16384_Val << WDT_CONFIG_PER_Pos)
108 #define WDT_CONFIG_WINDOW_Pos 4
109 #define WDT_CONFIG_WINDOW_Msk (_U_(0xF) << WDT_CONFIG_WINDOW_Pos)
110 #define WDT_CONFIG_WINDOW(value) (WDT_CONFIG_WINDOW_Msk & ((value) << WDT_CONFIG_WINDOW_Pos))
111 #define WDT_CONFIG_WINDOW_CYC8_Val _U_(0x0)
112 #define WDT_CONFIG_WINDOW_CYC16_Val _U_(0x1)
113 #define WDT_CONFIG_WINDOW_CYC32_Val _U_(0x2)
114 #define WDT_CONFIG_WINDOW_CYC64_Val _U_(0x3)
115 #define WDT_CONFIG_WINDOW_CYC128_Val _U_(0x4)
116 #define WDT_CONFIG_WINDOW_CYC256_Val _U_(0x5)
117 #define WDT_CONFIG_WINDOW_CYC512_Val _U_(0x6)
118 #define WDT_CONFIG_WINDOW_CYC1024_Val _U_(0x7)
119 #define WDT_CONFIG_WINDOW_CYC2048_Val _U_(0x8)
120 #define WDT_CONFIG_WINDOW_CYC4096_Val _U_(0x9)
121 #define WDT_CONFIG_WINDOW_CYC8192_Val _U_(0xA)
122 #define WDT_CONFIG_WINDOW_CYC16384_Val _U_(0xB)
123 #define WDT_CONFIG_WINDOW_CYC8 (WDT_CONFIG_WINDOW_CYC8_Val << WDT_CONFIG_WINDOW_Pos)
124 #define WDT_CONFIG_WINDOW_CYC16 (WDT_CONFIG_WINDOW_CYC16_Val << WDT_CONFIG_WINDOW_Pos)
125 #define WDT_CONFIG_WINDOW_CYC32 (WDT_CONFIG_WINDOW_CYC32_Val << WDT_CONFIG_WINDOW_Pos)
126 #define WDT_CONFIG_WINDOW_CYC64 (WDT_CONFIG_WINDOW_CYC64_Val << WDT_CONFIG_WINDOW_Pos)
127 #define WDT_CONFIG_WINDOW_CYC128 (WDT_CONFIG_WINDOW_CYC128_Val << WDT_CONFIG_WINDOW_Pos)
128 #define WDT_CONFIG_WINDOW_CYC256 (WDT_CONFIG_WINDOW_CYC256_Val << WDT_CONFIG_WINDOW_Pos)
129 #define WDT_CONFIG_WINDOW_CYC512 (WDT_CONFIG_WINDOW_CYC512_Val << WDT_CONFIG_WINDOW_Pos)
130 #define WDT_CONFIG_WINDOW_CYC1024 (WDT_CONFIG_WINDOW_CYC1024_Val << WDT_CONFIG_WINDOW_Pos)
131 #define WDT_CONFIG_WINDOW_CYC2048 (WDT_CONFIG_WINDOW_CYC2048_Val << WDT_CONFIG_WINDOW_Pos)
132 #define WDT_CONFIG_WINDOW_CYC4096 (WDT_CONFIG_WINDOW_CYC4096_Val << WDT_CONFIG_WINDOW_Pos)
133 #define WDT_CONFIG_WINDOW_CYC8192 (WDT_CONFIG_WINDOW_CYC8192_Val << WDT_CONFIG_WINDOW_Pos)
134 #define WDT_CONFIG_WINDOW_CYC16384 (WDT_CONFIG_WINDOW_CYC16384_Val << WDT_CONFIG_WINDOW_Pos)
135 #define WDT_CONFIG_MASK _U_(0xFF)
138 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
148 #define WDT_EWCTRL_OFFSET 0x2
149 #define WDT_EWCTRL_RESETVALUE _U_(0x0B)
151 #define WDT_EWCTRL_EWOFFSET_Pos 0
152 #define WDT_EWCTRL_EWOFFSET_Msk (_U_(0xF) << WDT_EWCTRL_EWOFFSET_Pos)
153 #define WDT_EWCTRL_EWOFFSET(value) (WDT_EWCTRL_EWOFFSET_Msk & ((value) << WDT_EWCTRL_EWOFFSET_Pos))
154 #define WDT_EWCTRL_EWOFFSET_CYC8_Val _U_(0x0)
155 #define WDT_EWCTRL_EWOFFSET_CYC16_Val _U_(0x1)
156 #define WDT_EWCTRL_EWOFFSET_CYC32_Val _U_(0x2)
157 #define WDT_EWCTRL_EWOFFSET_CYC64_Val _U_(0x3)
158 #define WDT_EWCTRL_EWOFFSET_CYC128_Val _U_(0x4)
159 #define WDT_EWCTRL_EWOFFSET_CYC256_Val _U_(0x5)
160 #define WDT_EWCTRL_EWOFFSET_CYC512_Val _U_(0x6)
161 #define WDT_EWCTRL_EWOFFSET_CYC1024_Val _U_(0x7)
162 #define WDT_EWCTRL_EWOFFSET_CYC2048_Val _U_(0x8)
163 #define WDT_EWCTRL_EWOFFSET_CYC4096_Val _U_(0x9)
164 #define WDT_EWCTRL_EWOFFSET_CYC8192_Val _U_(0xA)
165 #define WDT_EWCTRL_EWOFFSET_CYC16384_Val _U_(0xB)
166 #define WDT_EWCTRL_EWOFFSET_CYC8 (WDT_EWCTRL_EWOFFSET_CYC8_Val << WDT_EWCTRL_EWOFFSET_Pos)
167 #define WDT_EWCTRL_EWOFFSET_CYC16 (WDT_EWCTRL_EWOFFSET_CYC16_Val << WDT_EWCTRL_EWOFFSET_Pos)
168 #define WDT_EWCTRL_EWOFFSET_CYC32 (WDT_EWCTRL_EWOFFSET_CYC32_Val << WDT_EWCTRL_EWOFFSET_Pos)
169 #define WDT_EWCTRL_EWOFFSET_CYC64 (WDT_EWCTRL_EWOFFSET_CYC64_Val << WDT_EWCTRL_EWOFFSET_Pos)
170 #define WDT_EWCTRL_EWOFFSET_CYC128 (WDT_EWCTRL_EWOFFSET_CYC128_Val << WDT_EWCTRL_EWOFFSET_Pos)
171 #define WDT_EWCTRL_EWOFFSET_CYC256 (WDT_EWCTRL_EWOFFSET_CYC256_Val << WDT_EWCTRL_EWOFFSET_Pos)
172 #define WDT_EWCTRL_EWOFFSET_CYC512 (WDT_EWCTRL_EWOFFSET_CYC512_Val << WDT_EWCTRL_EWOFFSET_Pos)
173 #define WDT_EWCTRL_EWOFFSET_CYC1024 (WDT_EWCTRL_EWOFFSET_CYC1024_Val << WDT_EWCTRL_EWOFFSET_Pos)
174 #define WDT_EWCTRL_EWOFFSET_CYC2048 (WDT_EWCTRL_EWOFFSET_CYC2048_Val << WDT_EWCTRL_EWOFFSET_Pos)
175 #define WDT_EWCTRL_EWOFFSET_CYC4096 (WDT_EWCTRL_EWOFFSET_CYC4096_Val << WDT_EWCTRL_EWOFFSET_Pos)
176 #define WDT_EWCTRL_EWOFFSET_CYC8192 (WDT_EWCTRL_EWOFFSET_CYC8192_Val << WDT_EWCTRL_EWOFFSET_Pos)
177 #define WDT_EWCTRL_EWOFFSET_CYC16384 (WDT_EWCTRL_EWOFFSET_CYC16384_Val << WDT_EWCTRL_EWOFFSET_Pos)
178 #define WDT_EWCTRL_MASK _U_(0x0F)
181 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
191 #define WDT_INTENCLR_OFFSET 0x4
192 #define WDT_INTENCLR_RESETVALUE _U_(0x00)
194 #define WDT_INTENCLR_EW_Pos 0
195 #define WDT_INTENCLR_EW (_U_(0x1) << WDT_INTENCLR_EW_Pos)
196 #define WDT_INTENCLR_MASK _U_(0x01)
199 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
209 #define WDT_INTENSET_OFFSET 0x5
210 #define WDT_INTENSET_RESETVALUE _U_(0x00)
212 #define WDT_INTENSET_EW_Pos 0
213 #define WDT_INTENSET_EW (_U_(0x1) << WDT_INTENSET_EW_Pos)
214 #define WDT_INTENSET_MASK _U_(0x01)
217 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
227 #define WDT_INTFLAG_OFFSET 0x6
228 #define WDT_INTFLAG_RESETVALUE _U_(0x00)
230 #define WDT_INTFLAG_EW_Pos 0
231 #define WDT_INTFLAG_EW (_U_(0x1) << WDT_INTFLAG_EW_Pos)
232 #define WDT_INTFLAG_MASK _U_(0x01)
235 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
249 #define WDT_SYNCBUSY_OFFSET 0x8
250 #define WDT_SYNCBUSY_RESETVALUE _U_(0x00000000)
252 #define WDT_SYNCBUSY_ENABLE_Pos 1
253 #define WDT_SYNCBUSY_ENABLE (_U_(0x1) << WDT_SYNCBUSY_ENABLE_Pos)
254 #define WDT_SYNCBUSY_WEN_Pos 2
255 #define WDT_SYNCBUSY_WEN (_U_(0x1) << WDT_SYNCBUSY_WEN_Pos)
256 #define WDT_SYNCBUSY_ALWAYSON_Pos 3
257 #define WDT_SYNCBUSY_ALWAYSON (_U_(0x1) << WDT_SYNCBUSY_ALWAYSON_Pos)
258 #define WDT_SYNCBUSY_CLEAR_Pos 4
259 #define WDT_SYNCBUSY_CLEAR (_U_(0x1) << WDT_SYNCBUSY_CLEAR_Pos)
260 #define WDT_SYNCBUSY_MASK _U_(0x0000001E)
263 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
272 #define WDT_CLEAR_OFFSET 0xC
273 #define WDT_CLEAR_RESETVALUE _U_(0x00)
275 #define WDT_CLEAR_CLEAR_Pos 0
276 #define WDT_CLEAR_CLEAR_Msk (_U_(0xFF) << WDT_CLEAR_CLEAR_Pos)
277 #define WDT_CLEAR_CLEAR(value) (WDT_CLEAR_CLEAR_Msk & ((value) << WDT_CLEAR_CLEAR_Pos))
278 #define WDT_CLEAR_CLEAR_KEY_Val _U_(0xA5)
279 #define WDT_CLEAR_CLEAR_KEY (WDT_CLEAR_CLEAR_KEY_Val << WDT_CLEAR_CLEAR_Pos)
280 #define WDT_CLEAR_MASK _U_(0xFF)
283 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
__O WDT_CLEAR_Type CLEAR
Offset: 0xC ( /W 8) Clear.
__I WDT_SYNCBUSY_Type SYNCBUSY
Offset: 0x8 (R/ 32) Synchronization Busy.
__IO WDT_INTFLAG_Type INTFLAG
Offset: 0x6 (R/W 8) Interrupt Flag Status and Clear.
__IO WDT_INTENCLR_Type INTENCLR
Offset: 0x4 (R/W 8) Interrupt Enable Clear.
__IO WDT_CONFIG_Type CONFIG
Offset: 0x1 (R/W 8) Configuration.
__IO WDT_INTENSET_Type INTENSET
Offset: 0x5 (R/W 8) Interrupt Enable Set.
__IO WDT_EWCTRL_Type EWCTRL
Offset: 0x2 (R/W 8) Early Warning Interrupt Control.
volatile const uint8_t RoReg8
__IO WDT_CTRLA_Type CTRLA
Offset: 0x0 (R/W 8) Control.