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30 #ifndef _SAME54_RTC_INSTANCE_
31 #define _SAME54_RTC_INSTANCE_
34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
35 #define REG_RTC_DBGCTRL (0x4000240E)
36 #define REG_RTC_FREQCORR (0x40002414)
37 #define REG_RTC_GP0 (0x40002440)
38 #define REG_RTC_GP1 (0x40002444)
39 #define REG_RTC_GP2 (0x40002448)
40 #define REG_RTC_GP3 (0x4000244C)
41 #define REG_RTC_TAMPCTRL (0x40002460)
42 #define REG_RTC_TAMPID (0x40002468)
43 #define REG_RTC_BKUP0 (0x40002480)
44 #define REG_RTC_BKUP1 (0x40002484)
45 #define REG_RTC_BKUP2 (0x40002488)
46 #define REG_RTC_BKUP3 (0x4000248C)
47 #define REG_RTC_BKUP4 (0x40002490)
48 #define REG_RTC_BKUP5 (0x40002494)
49 #define REG_RTC_BKUP6 (0x40002498)
50 #define REG_RTC_BKUP7 (0x4000249C)
51 #define REG_RTC_MODE0_CTRLA (0x40002400)
52 #define REG_RTC_MODE0_CTRLB (0x40002402)
53 #define REG_RTC_MODE0_EVCTRL (0x40002404)
54 #define REG_RTC_MODE0_INTENCLR (0x40002408)
55 #define REG_RTC_MODE0_INTENSET (0x4000240A)
56 #define REG_RTC_MODE0_INTFLAG (0x4000240C)
57 #define REG_RTC_MODE0_SYNCBUSY (0x40002410)
58 #define REG_RTC_MODE0_COUNT (0x40002418)
59 #define REG_RTC_MODE0_COMP0 (0x40002420)
60 #define REG_RTC_MODE0_COMP1 (0x40002424)
61 #define REG_RTC_MODE0_TIMESTAMP (0x40002464)
62 #define REG_RTC_MODE1_CTRLA (0x40002400)
63 #define REG_RTC_MODE1_CTRLB (0x40002402)
64 #define REG_RTC_MODE1_EVCTRL (0x40002404)
65 #define REG_RTC_MODE1_INTENCLR (0x40002408)
66 #define REG_RTC_MODE1_INTENSET (0x4000240A)
67 #define REG_RTC_MODE1_INTFLAG (0x4000240C)
68 #define REG_RTC_MODE1_SYNCBUSY (0x40002410)
69 #define REG_RTC_MODE1_COUNT (0x40002418)
70 #define REG_RTC_MODE1_PER (0x4000241C)
71 #define REG_RTC_MODE1_COMP0 (0x40002420)
72 #define REG_RTC_MODE1_COMP1 (0x40002422)
73 #define REG_RTC_MODE1_COMP2 (0x40002424)
74 #define REG_RTC_MODE1_COMP3 (0x40002426)
75 #define REG_RTC_MODE1_TIMESTAMP (0x40002464)
76 #define REG_RTC_MODE2_CTRLA (0x40002400)
77 #define REG_RTC_MODE2_CTRLB (0x40002402)
78 #define REG_RTC_MODE2_EVCTRL (0x40002404)
79 #define REG_RTC_MODE2_INTENCLR (0x40002408)
80 #define REG_RTC_MODE2_INTENSET (0x4000240A)
81 #define REG_RTC_MODE2_INTFLAG (0x4000240C)
82 #define REG_RTC_MODE2_SYNCBUSY (0x40002410)
83 #define REG_RTC_MODE2_CLOCK (0x40002418)
84 #define REG_RTC_MODE2_TIMESTAMP (0x40002464)
85 #define REG_RTC_MODE2_ALARM_ALARM0 (0x40002420)
86 #define REG_RTC_MODE2_ALARM_MASK0 (0x40002424)
87 #define REG_RTC_MODE2_ALARM_ALARM1 (0x40002428)
88 #define REG_RTC_MODE2_ALARM_MASK1 (0x4000242C)
90 #define REG_RTC_DBGCTRL (*(RwReg8 *)0x4000240EUL)
91 #define REG_RTC_FREQCORR (*(RwReg8 *)0x40002414UL)
92 #define REG_RTC_GP0 (*(RwReg *)0x40002440UL)
93 #define REG_RTC_GP1 (*(RwReg *)0x40002444UL)
94 #define REG_RTC_GP2 (*(RwReg *)0x40002448UL)
95 #define REG_RTC_GP3 (*(RwReg *)0x4000244CUL)
96 #define REG_RTC_TAMPCTRL (*(RwReg *)0x40002460UL)
97 #define REG_RTC_TAMPID (*(RwReg *)0x40002468UL)
98 #define REG_RTC_BKUP0 (*(RwReg *)0x40002480UL)
99 #define REG_RTC_BKUP1 (*(RwReg *)0x40002484UL)
100 #define REG_RTC_BKUP2 (*(RwReg *)0x40002488UL)
101 #define REG_RTC_BKUP3 (*(RwReg *)0x4000248CUL)
102 #define REG_RTC_BKUP4 (*(RwReg *)0x40002490UL)
103 #define REG_RTC_BKUP5 (*(RwReg *)0x40002494UL)
104 #define REG_RTC_BKUP6 (*(RwReg *)0x40002498UL)
105 #define REG_RTC_BKUP7 (*(RwReg *)0x4000249CUL)
106 #define REG_RTC_MODE0_CTRLA (*(RwReg16*)0x40002400UL)
107 #define REG_RTC_MODE0_CTRLB (*(RwReg16*)0x40002402UL)
108 #define REG_RTC_MODE0_EVCTRL (*(RwReg *)0x40002404UL)
109 #define REG_RTC_MODE0_INTENCLR (*(RwReg16*)0x40002408UL)
110 #define REG_RTC_MODE0_INTENSET (*(RwReg16*)0x4000240AUL)
111 #define REG_RTC_MODE0_INTFLAG (*(RwReg16*)0x4000240CUL)
112 #define REG_RTC_MODE0_SYNCBUSY (*(RoReg *)0x40002410UL)
113 #define REG_RTC_MODE0_COUNT (*(RwReg *)0x40002418UL)
114 #define REG_RTC_MODE0_COMP0 (*(RwReg *)0x40002420UL)
115 #define REG_RTC_MODE0_COMP1 (*(RwReg *)0x40002424UL)
116 #define REG_RTC_MODE0_TIMESTAMP (*(RoReg *)0x40002464UL)
117 #define REG_RTC_MODE1_CTRLA (*(RwReg16*)0x40002400UL)
118 #define REG_RTC_MODE1_CTRLB (*(RwReg16*)0x40002402UL)
119 #define REG_RTC_MODE1_EVCTRL (*(RwReg *)0x40002404UL)
120 #define REG_RTC_MODE1_INTENCLR (*(RwReg16*)0x40002408UL)
121 #define REG_RTC_MODE1_INTENSET (*(RwReg16*)0x4000240AUL)
122 #define REG_RTC_MODE1_INTFLAG (*(RwReg16*)0x4000240CUL)
123 #define REG_RTC_MODE1_SYNCBUSY (*(RoReg *)0x40002410UL)
124 #define REG_RTC_MODE1_COUNT (*(RwReg16*)0x40002418UL)
125 #define REG_RTC_MODE1_PER (*(RwReg16*)0x4000241CUL)
126 #define REG_RTC_MODE1_COMP0 (*(RwReg16*)0x40002420UL)
127 #define REG_RTC_MODE1_COMP1 (*(RwReg16*)0x40002422UL)
128 #define REG_RTC_MODE1_COMP2 (*(RwReg16*)0x40002424UL)
129 #define REG_RTC_MODE1_COMP3 (*(RwReg16*)0x40002426UL)
130 #define REG_RTC_MODE1_TIMESTAMP (*(RoReg *)0x40002464UL)
131 #define REG_RTC_MODE2_CTRLA (*(RwReg16*)0x40002400UL)
132 #define REG_RTC_MODE2_CTRLB (*(RwReg16*)0x40002402UL)
133 #define REG_RTC_MODE2_EVCTRL (*(RwReg *)0x40002404UL)
134 #define REG_RTC_MODE2_INTENCLR (*(RwReg16*)0x40002408UL)
135 #define REG_RTC_MODE2_INTENSET (*(RwReg16*)0x4000240AUL)
136 #define REG_RTC_MODE2_INTFLAG (*(RwReg16*)0x4000240CUL)
137 #define REG_RTC_MODE2_SYNCBUSY (*(RoReg *)0x40002410UL)
138 #define REG_RTC_MODE2_CLOCK (*(RwReg *)0x40002418UL)
139 #define REG_RTC_MODE2_TIMESTAMP (*(RoReg *)0x40002464UL)
140 #define REG_RTC_MODE2_ALARM_ALARM0 (*(RwReg *)0x40002420UL)
141 #define REG_RTC_MODE2_ALARM_MASK0 (*(RwReg8 *)0x40002424UL)
142 #define REG_RTC_MODE2_ALARM_ALARM1 (*(RwReg *)0x40002428UL)
143 #define REG_RTC_MODE2_ALARM_MASK1 (*(RwReg8 *)0x4000242CUL)
147 #define RTC_DMAC_ID_TIMESTAMP 1 // DMA RTC timestamp trigger
148 #define RTC_GPR_NUM 4 // Number of General-Purpose Registers
149 #define RTC_NUM_OF_ALARMS 2 // Number of Alarms
150 #define RTC_NUM_OF_BKREGS 8 // Number of Backup Registers
151 #define RTC_NUM_OF_COMP16 4 // Number of 16-bit Comparators
152 #define RTC_NUM_OF_COMP32 2 // Number of 32-bit Comparators
153 #define RTC_NUM_OF_TAMPERS 5 // Number of Tamper Inputs
154 #define RTC_PER_NUM 8 // Number of Periodic Intervals