Definition at line 284 of file dsu.h.
◆ __pad0__
uint32_t DSU_CFG_Type::__pad0__ |
bit: 5..31 Reserved
Definition at line 289 of file dsu.h.
◆ bit
struct { ... } DSU_CFG_Type::bit |
Structure used for bit access
◆ DCCDMALEVEL
uint32_t DSU_CFG_Type::DCCDMALEVEL |
bit: 2.. 3 DMA Trigger Level
Definition at line 287 of file dsu.h.
◆ ETBRAMEN
uint32_t DSU_CFG_Type::ETBRAMEN |
bit: 4 Trace Control
Definition at line 288 of file dsu.h.
◆ LQOS
uint32_t DSU_CFG_Type::LQOS |
bit: 0.. 1 Latency Quality Of Service
Definition at line 286 of file dsu.h.
◆ reg
uint32_t DSU_CFG_Type::reg |
Type used for register access
Definition at line 291 of file dsu.h.
The documentation for this union was generated from the following file:
- /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/dsu.h