Definition at line 69 of file qspi.h.
◆ __pad0__
uint32_t QSPI_CTRLB_Type::__pad0__ |
bit: 6.. 7 Reserved
Definition at line 76 of file qspi.h.
◆ __pad1__
uint32_t QSPI_CTRLB_Type::__pad1__ |
bit: 12..15 Reserved
Definition at line 78 of file qspi.h.
◆ bit
struct { ... } QSPI_CTRLB_Type::bit |
Structure used for bit access
◆ CSMODE
uint32_t QSPI_CTRLB_Type::CSMODE |
bit: 4.. 5 Chip Select Mode
Definition at line 75 of file qspi.h.
◆ DATALEN
uint32_t QSPI_CTRLB_Type::DATALEN |
bit: 8..11 Data Length
Definition at line 77 of file qspi.h.
◆ DLYBCT
uint32_t QSPI_CTRLB_Type::DLYBCT |
bit: 16..23 Delay Between Consecutive Transfers
Definition at line 79 of file qspi.h.
◆ DLYCS
uint32_t QSPI_CTRLB_Type::DLYCS |
bit: 24..31 Minimum Inactive CS Delay
Definition at line 80 of file qspi.h.
◆ LOOPEN
uint32_t QSPI_CTRLB_Type::LOOPEN |
bit: 1 Local Loopback Enable
Definition at line 72 of file qspi.h.
◆ MODE
uint32_t QSPI_CTRLB_Type::MODE |
bit: 0 Serial Memory Mode
Definition at line 71 of file qspi.h.
◆ reg
uint32_t QSPI_CTRLB_Type::reg |
Type used for register access
Definition at line 82 of file qspi.h.
◆ SMEMREG
uint32_t QSPI_CTRLB_Type::SMEMREG |
bit: 3 Serial Memory reg
Definition at line 74 of file qspi.h.
◆ WDRBT
uint32_t QSPI_CTRLB_Type::WDRBT |
bit: 2 Wait Data Read Before Transfer
Definition at line 73 of file qspi.h.
The documentation for this union was generated from the following file:
- /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/qspi.h