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30 #ifndef _SAME54_TRNG_COMPONENT_
31 #define _SAME54_TRNG_COMPONENT_
40 #define REV_TRNG 0x110
43 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
56 #define TRNG_CTRLA_OFFSET 0x00
57 #define TRNG_CTRLA_RESETVALUE _U_(0x00)
59 #define TRNG_CTRLA_ENABLE_Pos 1
60 #define TRNG_CTRLA_ENABLE (_U_(0x1) << TRNG_CTRLA_ENABLE_Pos)
61 #define TRNG_CTRLA_RUNSTDBY_Pos 6
62 #define TRNG_CTRLA_RUNSTDBY (_U_(0x1) << TRNG_CTRLA_RUNSTDBY_Pos)
63 #define TRNG_CTRLA_MASK _U_(0x42)
66 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
76 #define TRNG_EVCTRL_OFFSET 0x04
77 #define TRNG_EVCTRL_RESETVALUE _U_(0x00)
79 #define TRNG_EVCTRL_DATARDYEO_Pos 0
80 #define TRNG_EVCTRL_DATARDYEO (_U_(0x1) << TRNG_EVCTRL_DATARDYEO_Pos)
81 #define TRNG_EVCTRL_MASK _U_(0x01)
84 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
94 #define TRNG_INTENCLR_OFFSET 0x08
95 #define TRNG_INTENCLR_RESETVALUE _U_(0x00)
97 #define TRNG_INTENCLR_DATARDY_Pos 0
98 #define TRNG_INTENCLR_DATARDY (_U_(0x1) << TRNG_INTENCLR_DATARDY_Pos)
99 #define TRNG_INTENCLR_MASK _U_(0x01)
102 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
112 #define TRNG_INTENSET_OFFSET 0x09
113 #define TRNG_INTENSET_RESETVALUE _U_(0x00)
115 #define TRNG_INTENSET_DATARDY_Pos 0
116 #define TRNG_INTENSET_DATARDY (_U_(0x1) << TRNG_INTENSET_DATARDY_Pos)
117 #define TRNG_INTENSET_MASK _U_(0x01)
120 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
130 #define TRNG_INTFLAG_OFFSET 0x0A
131 #define TRNG_INTFLAG_RESETVALUE _U_(0x00)
133 #define TRNG_INTFLAG_DATARDY_Pos 0
134 #define TRNG_INTFLAG_DATARDY (_U_(0x1) << TRNG_INTFLAG_DATARDY_Pos)
135 #define TRNG_INTFLAG_MASK _U_(0x01)
138 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
147 #define TRNG_DATA_OFFSET 0x20
148 #define TRNG_DATA_RESETVALUE _U_(0x00000000)
150 #define TRNG_DATA_DATA_Pos 0
151 #define TRNG_DATA_DATA_Msk (_U_(0xFFFFFFFF) << TRNG_DATA_DATA_Pos)
152 #define TRNG_DATA_DATA(value) (TRNG_DATA_DATA_Msk & ((value) << TRNG_DATA_DATA_Pos))
153 #define TRNG_DATA_MASK _U_(0xFFFFFFFF)
156 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
__IO TRNG_CTRLA_Type CTRLA
Offset: 0x00 (R/W 8) Control A.
__IO TRNG_INTENSET_Type INTENSET
Offset: 0x09 (R/W 8) Interrupt Enable Set.
__IO TRNG_INTENCLR_Type INTENCLR
Offset: 0x08 (R/W 8) Interrupt Enable Clear.
__I TRNG_DATA_Type DATA
Offset: 0x20 (R/ 32) Output Data.
__IO TRNG_INTFLAG_Type INTFLAG
Offset: 0x0A (R/W 8) Interrupt Flag Status and Clear.
volatile const uint8_t RoReg8
__IO TRNG_EVCTRL_Type EVCTRL
Offset: 0x04 (R/W 8) Event Control.