Definition at line 1093 of file dmac.h.
◆ __pad0__
uint8_t DMAC_CHINTENCLR_Type::__pad0__ |
bit: 3.. 7 Reserved
Definition at line 1098 of file dmac.h.
◆ bit
struct { ... } DMAC_CHINTENCLR_Type::bit |
Structure used for bit access
◆ reg
uint8_t DMAC_CHINTENCLR_Type::reg |
Type used for register access
Definition at line 1100 of file dmac.h.
◆ SUSP
uint8_t DMAC_CHINTENCLR_Type::SUSP |
bit: 2 Channel Suspend Interrupt Enable
Definition at line 1097 of file dmac.h.
◆ TCMPL
uint8_t DMAC_CHINTENCLR_Type::TCMPL |
bit: 1 Channel Transfer Complete Interrupt Enable
Definition at line 1096 of file dmac.h.
◆ TERR
uint8_t DMAC_CHINTENCLR_Type::TERR |
bit: 0 Channel Transfer Error Interrupt Enable
Definition at line 1095 of file dmac.h.
The documentation for this union was generated from the following file:
- /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/dmac.h