Definition at line 44 of file dsu.h.
◆ __pad0__
uint8_t DSU_CTRL_Type::__pad0__ |
bit: 1 Reserved
Definition at line 47 of file dsu.h.
◆ __pad1__
uint8_t DSU_CTRL_Type::__pad1__ |
bit: 5 Reserved
Definition at line 51 of file dsu.h.
◆ ARR
uint8_t DSU_CTRL_Type::ARR |
bit: 6 Auxiliary Row Read
Definition at line 52 of file dsu.h.
◆ bit
struct { ... } DSU_CTRL_Type::bit |
Structure used for bit access
◆ CE
uint8_t DSU_CTRL_Type::CE |
bit: 4 Chip-Erase
Definition at line 50 of file dsu.h.
◆ CRC
uint8_t DSU_CTRL_Type::CRC |
bit: 2 32-bit Cyclic Redundancy Code
Definition at line 48 of file dsu.h.
◆ MBIST
uint8_t DSU_CTRL_Type::MBIST |
bit: 3 Memory built-in self-test
Definition at line 49 of file dsu.h.
◆ reg
uint8_t DSU_CTRL_Type::reg |
Type used for register access
Definition at line 55 of file dsu.h.
◆ SMSA
uint8_t DSU_CTRL_Type::SMSA |
bit: 7 Start Memory Stream Access
Definition at line 53 of file dsu.h.
◆ SWRST
uint8_t DSU_CTRL_Type::SWRST |
bit: 0 Software Reset
Definition at line 46 of file dsu.h.
The documentation for this union was generated from the following file:
- /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/dsu.h