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30 #ifndef _SAME54_PAC_INSTANCE_
31 #define _SAME54_PAC_INSTANCE_
34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
35 #define REG_PAC_WRCTRL (0x40000000)
36 #define REG_PAC_EVCTRL (0x40000004)
37 #define REG_PAC_INTENCLR (0x40000008)
38 #define REG_PAC_INTENSET (0x40000009)
39 #define REG_PAC_INTFLAGAHB (0x40000010)
40 #define REG_PAC_INTFLAGA (0x40000014)
41 #define REG_PAC_INTFLAGB (0x40000018)
42 #define REG_PAC_INTFLAGC (0x4000001C)
43 #define REG_PAC_INTFLAGD (0x40000020)
44 #define REG_PAC_STATUSA (0x40000034)
45 #define REG_PAC_STATUSB (0x40000038)
46 #define REG_PAC_STATUSC (0x4000003C)
47 #define REG_PAC_STATUSD (0x40000040)
49 #define REG_PAC_WRCTRL (*(RwReg *)0x40000000UL)
50 #define REG_PAC_EVCTRL (*(RwReg8 *)0x40000004UL)
51 #define REG_PAC_INTENCLR (*(RwReg8 *)0x40000008UL)
52 #define REG_PAC_INTENSET (*(RwReg8 *)0x40000009UL)
53 #define REG_PAC_INTFLAGAHB (*(RwReg *)0x40000010UL)
54 #define REG_PAC_INTFLAGA (*(RwReg *)0x40000014UL)
55 #define REG_PAC_INTFLAGB (*(RwReg *)0x40000018UL)
56 #define REG_PAC_INTFLAGC (*(RwReg *)0x4000001CUL)
57 #define REG_PAC_INTFLAGD (*(RwReg *)0x40000020UL)
58 #define REG_PAC_STATUSA (*(RoReg *)0x40000034UL)
59 #define REG_PAC_STATUSB (*(RoReg *)0x40000038UL)
60 #define REG_PAC_STATUSC (*(RoReg *)0x4000003CUL)
61 #define REG_PAC_STATUSD (*(RoReg *)0x40000040UL)
65 #define PAC_CLK_AHB_DOMAIN // Clock domain of AHB clock
66 #define PAC_CLK_AHB_ID 12 // AHB clock index
67 #define PAC_HPB_NUM 4 // Number of bridges AHB/APB