OSCCTRL_DFLLSYNC_Type Union Reference

## Data Fields

struct {
uint8_t __pad0__:1
uint8_t ENABLE:1
uint8_t DFLLCTRLB:1
uint8_t DFLLVAL:1
uint8_t DFLLMUL:1
uint8_t __pad1__:3
} | bit
uint8_t | reg

## Detailed Description

Definition at line 577 of file oscctrl.h.

## Field Documentation

## __pad0__

uint8_t OSCCTRL_DFLLSYNC_Type::__pad0__

bit: 0 Reserved

Definition at line 579 of file oscctrl.h.

## __pad1__

uint8_t OSCCTRL_DFLLSYNC_Type::__pad1__

bit: 5.. 7 Reserved

Definition at line 584 of file oscctrl.h.

## bit

struct { ... } OSCCTRL_DFLLSYNC_Type::bit

Structure used for bit access

## DFLLCTRLB

uint8_t OSCCTRL_DFLLSYNC_Type::DFLLCTRLB

bit: 2 DFLLCTRLB Synchronization Busy

Definition at line 581 of file oscctrl.h.

## DFLLMUL

uint8_t OSCCTRL_DFLLSYNC_Type::DFLLMUL

bit: 4 DFLLMUL Synchronization Busy

Definition at line 583 of file oscctrl.h.

## DFLLVAL

uint8_t OSCCTRL_DFLLSYNC_Type::DFLLVAL

bit: 3 DFLLVAL Synchronization Busy

Definition at line 582 of file oscctrl.h.

## ENABLE

uint8_t OSCCTRL_DFLLSYNC_Type::ENABLE

bit: 1 ENABLE Synchronization Busy

Definition at line 580 of file oscctrl.h.

## reg

uint8_t OSCCTRL_DFLLSYNC_Type::reg

Type used for register access

Definition at line 586 of file oscctrl.h.

The documentation for this union was generated from the following file:

- /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/oscctrl.h