Core DFLL48M Configuration

## Macros

#define | CORE_CONF_CLK_DFLL_ENABLE (1)
| in group 1
#define | CORE_CONF_CLK_DFLL_ONDEMAND (0)
| in group 1
#define | CORE_CONF_CLK_DFLL_RUNSTDBY (0)
| in group 1
#define | CORE_CONF_CLK_DFLL_WAITLOCK (0)
| in group 1
#define | CORE_CONF_CLK_DFLL_BPLKC (0)
#define | CORE_CONF_CLK_DFLL_QLDIS (0)
#define | CORE_CONF_CLK_DFLL_CCDIS (1)
#define | CORE_CONF_CLK_DFLL_USBCRM (1)
#define | CORE_CONF_CLK_DFLL_LLAW (0)
#define | CORE_CONF_CLK_DFLL_STABLE_FCALIB CORE_CONF_CLK_DFLLCTRL_STABLE_FCALIB_NOT_FIXED
#define | CORE_CONF_CLK_DFLL_MODE 0x01
#define | CORE_CONF_CLK_DFLL_DIFF_VAL 0
#define | CORE_CONF_CLK_DFLL_COARSE_VAL (0x1f / 4)
#define | CORE_CONF_CLK_DFLL_FINE_VAL 128
#define | CORE_CONF_CLK_DFLL_CSTEP_VAL 1
#define | CORE_CONF_CLK_DFLL_FSTEP_VAL 1
#define | CORE_CONF_CLK_DFLL_MUL_VAL (48000000)

## Detailed Description

This is the first group