TC_INTENSET_Type Union Reference

## Data Fields

struct {
uint8_t OVF:1
uint8_t ERR:1
uint8_t __pad0__:2
uint8_t MC0:1
uint8_t MC1:1
uint8_t __pad1__:2
} | bit
struct {
uint8_t __pad0__:4
uint8_t MC:2
uint8_t __pad1__:2
} | vec
uint8_t | reg

## Detailed Description

Definition at line 340 of file tc.h.

## Field Documentation

## __pad0__

uint8_t TC_INTENSET_Type::__pad0__

bit: 2.. 3 Reserved

bit: 0.. 3 Reserved

Definition at line 344 of file tc.h.

## __pad1__

uint8_t TC_INTENSET_Type::__pad1__

bit: 6.. 7 Reserved

Definition at line 347 of file tc.h.

## bit

struct { ... } TC_INTENSET_Type::bit

Structure used for bit access

## ERR

uint8_t TC_INTENSET_Type::ERR

bit: 1 ERR Interrupt Enable

Definition at line 343 of file tc.h.

## MC

uint8_t TC_INTENSET_Type::MC

bit: 4.. 5 MC Interrupt Enable x

Definition at line 351 of file tc.h.

## MC0

uint8_t TC_INTENSET_Type::MC0

bit: 4 MC Interrupt Enable 0

Definition at line 345 of file tc.h.

## MC1

uint8_t TC_INTENSET_Type::MC1

bit: 5 MC Interrupt Enable 1

Definition at line 346 of file tc.h.

## OVF

uint8_t TC_INTENSET_Type::OVF

bit: 0 OVF Interrupt Enable

Definition at line 342 of file tc.h.

## reg

uint8_t TC_INTENSET_Type::reg

Type used for register access

Definition at line 354 of file tc.h.

## vec

struct { ... } TC_INTENSET_Type::vec

Structure used for vec access

The documentation for this union was generated from the following file:

- /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/tc.h