EIC_NMICTRL_Type Union Reference

## Data Fields

struct {
uint8_t NMISENSE:3
uint8_t NMIFILTEN:1
uint8_t NMIASYNCH:1
uint8_t __pad0__:3
} | bit
uint8_t | reg

## Detailed Description

Definition at line 69 of file eic.h.

## Field Documentation

## __pad0__

uint8_t EIC_NMICTRL_Type::__pad0__

bit: 5.. 7 Reserved

Definition at line 74 of file eic.h.

## bit

struct { ... } EIC_NMICTRL_Type::bit

Structure used for bit access

## NMIASYNCH

uint8_t EIC_NMICTRL_Type::NMIASYNCH

bit: 4 Asynchronous Edge Detection Mode

Definition at line 73 of file eic.h.

## NMIFILTEN

uint8_t EIC_NMICTRL_Type::NMIFILTEN

bit: 3 Non-Maskable Interrupt Filter Enable

Definition at line 72 of file eic.h.

## NMISENSE

uint8_t EIC_NMICTRL_Type::NMISENSE

bit: 0.. 2 Non-Maskable Interrupt Sense Configuration

Definition at line 71 of file eic.h.

## reg

uint8_t EIC_NMICTRL_Type::reg

Type used for register access

Definition at line 76 of file eic.h.

The documentation for this union was generated from the following file:

- /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/eic.h