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30 #ifndef _SAME54_PM_INSTANCE_
31 #define _SAME54_PM_INSTANCE_
34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
35 #define REG_PM_CTRLA (0x40000400)
36 #define REG_PM_SLEEPCFG (0x40000401)
37 #define REG_PM_INTENCLR (0x40000404)
38 #define REG_PM_INTENSET (0x40000405)
39 #define REG_PM_INTFLAG (0x40000406)
40 #define REG_PM_STDBYCFG (0x40000408)
41 #define REG_PM_HIBCFG (0x40000409)
42 #define REG_PM_BKUPCFG (0x4000040A)
43 #define REG_PM_PWSAKDLY (0x40000412)
45 #define REG_PM_CTRLA (*(RwReg8 *)0x40000400UL)
46 #define REG_PM_SLEEPCFG (*(RwReg8 *)0x40000401UL)
47 #define REG_PM_INTENCLR (*(RwReg8 *)0x40000404UL)
48 #define REG_PM_INTENSET (*(RwReg8 *)0x40000405UL)
49 #define REG_PM_INTFLAG (*(RwReg8 *)0x40000406UL)
50 #define REG_PM_STDBYCFG (*(RwReg8 *)0x40000408UL)
51 #define REG_PM_HIBCFG (*(RwReg8 *)0x40000409UL)
52 #define REG_PM_BKUPCFG (*(RwReg8 *)0x4000040AUL)
53 #define REG_PM_PWSAKDLY (*(RwReg8 *)0x40000412UL)
57 #define PM_PD_NUM 0 // Number of switchable Power Domains