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first commit

linux
penguin 1 year ago
commit
5ef4e83b9d
100 changed files with 86327 additions and 0 deletions
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avr/avr/include/alloca.h View File

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/* Copyright (c) 2007, Dmitry Xmelkov
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */

/* $Id$ */

#ifndef _ALLOCA_H
#define _ALLOCA_H 1

#include <stddef.h>

/** \defgroup alloca <alloca.h>: Allocate space in the stack */

/** \ingroup alloca
\brief Allocate \a __size bytes of space in the stack frame of the caller.

This temporary space is automatically freed when the function that
called alloca() returns to its caller. Avr-libc defines the alloca() as
a macro, which is translated into the inlined \c __builtin_alloca()
function. The fact that the code is inlined, means that it is impossible
to take the address of this function, or to change its behaviour by
linking with a different library.

\return alloca() returns a pointer to the beginning of the allocated
space. If the allocation causes stack overflow, program behaviour is
undefined.
\warning Avoid use alloca() inside the list of arguments of a function
call.
*/
extern void *alloca (size_t __size);

#define alloca(size) __builtin_alloca (size)

#endif /* alloca.h */

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avr/avr/include/assert.h View File

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/* Copyright (c) 2005,2007 Joerg Wunsch
All rights reserved.

Portions of documentation Copyright (c) 1991, 1993
The Regents of the University of California.

All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.

* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.

* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.

$Id$
*/

/** \file */
/** \defgroup avr_assert <assert.h>: Diagnostics
\code #include <assert.h> \endcode

This header file defines a debugging aid.

As there is no standard error output stream available for many
applications using this library, the generation of a printable
error message is not enabled by default. These messages will
only be generated if the application defines the macro

\code __ASSERT_USE_STDERR \endcode

before including the \c <assert.h> header file. By default,
only abort() will be called to halt the application.
*/

/*@{*/

/*
* The ability to include this file (with or without NDEBUG) is a
* feature.
*/

#undef assert

#include <stdlib.h>

#if defined(__DOXYGEN__)
/**
* \def assert
* \param expression Expression to test for.
*
* The assert() macro tests the given expression and if it is false,
* the calling process is terminated. A diagnostic message is written
* to stderr and the function abort() is called, effectively
* terminating the program.
*
* If expression is true, the assert() macro does nothing.
*
* The assert() macro may be removed at compile time by defining
* NDEBUG as a macro (e.g., by using the compiler option -DNDEBUG).
*/
# define assert(expression)

#else /* !DOXYGEN */

# if defined(NDEBUG)
# define assert(e) ((void)0)
# else /* !NDEBUG */
# if defined(__ASSERT_USE_STDERR)
# define assert(e) ((e) ? (void)0 : \
__assert(__func__, __FILE__, __LINE__, #e))
# else /* !__ASSERT_USE_STDERR */
# define assert(e) ((e) ? (void)0 : abort())
# endif /* __ASSERT_USE_STDERR */
# endif /* NDEBUG */
#endif /* DOXYGEN */

#if (defined __STDC_VERSION__ && __STDC_VERSION__ >= 201112L) || \
((_GNUC_ > 4 || (_GNUC_ == 4 && _GNUC_MINOR_ >= 6)) && !defined __cplusplus)
# undef static_assert
# define static_assert _Static_assert
#endif

#ifdef __cplusplus
extern "C" {
#endif

#if !defined(__DOXYGEN__)

extern void __assert(const char *__func, const char *__file,
int __lineno, const char *__sexp);

#endif /* not __DOXYGEN__ */

#ifdef __cplusplus
}
#endif

/*@}*/
/* EOF */

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avr/avr/include/avr/boot.h View File

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/* Copyright (c) 2002,2003,2004,2005,2006,2007,2008,2009 Eric B. Weddington
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */

/* $Id$ */

#ifndef _AVR_BOOT_H_
#define _AVR_BOOT_H_ 1

/** \file */
/** \defgroup avr_boot <avr/boot.h>: Bootloader Support Utilities
\code
#include <avr/io.h>
#include <avr/boot.h>
\endcode

The macros in this module provide a C language interface to the
bootloader support functionality of certain AVR processors. These
macros are designed to work with all sizes of flash memory.

Global interrupts are not automatically disabled for these macros. It
is left up to the programmer to do this. See the code example below.
Also see the processor datasheet for caveats on having global interrupts
enabled during writing of the Flash.

\note Not all AVR processors provide bootloader support. See your
processor datasheet to see if it provides bootloader support.

\todo From email with Marek: On smaller devices (all except ATmega64/128),
__SPM_REG is in the I/O space, accessible with the shorter "in" and "out"
instructions - since the boot loader has a limited size, this could be an
important optimization.

\par API Usage Example
The following code shows typical usage of the boot API.

\code
#include <inttypes.h>
#include <avr/interrupt.h>
#include <avr/pgmspace.h>
void boot_program_page (uint32_t page, uint8_t *buf)
{
uint16_t i;
uint8_t sreg;

// Disable interrupts.

sreg = SREG;
cli();
eeprom_busy_wait ();

boot_page_erase (page);
boot_spm_busy_wait (); // Wait until the memory is erased.

for (i=0; i<SPM_PAGESIZE; i+=2)
{
// Set up little-endian word.

uint16_t w = *buf++;
w += (*buf++) << 8;
boot_page_fill (page + i, w);
}

boot_page_write (page); // Store buffer in flash page.
boot_spm_busy_wait(); // Wait until the memory is written.

// Reenable RWW-section again. We need this if we want to jump back
// to the application after bootloading.

boot_rww_enable ();

// Re-enable interrupts (if they were ever enabled).

SREG = sreg;
}\endcode */

#include <avr/eeprom.h>
#include <avr/io.h>
#include <inttypes.h>
#include <limits.h>

/* Check for SPM Control Register in processor. */
#if defined (SPMCSR)
# define __SPM_REG SPMCSR
#else
# if defined (SPMCR)
# define __SPM_REG SPMCR
# else
# error AVR processor does not provide bootloader support!
# endif
#endif


/* Check for SPM Enable bit. */
#if defined(SPMEN)
# define __SPM_ENABLE SPMEN
#elif defined(SELFPRGEN)
# define __SPM_ENABLE SELFPRGEN
#else
# error Cannot find SPM Enable bit definition!
#endif

/** \ingroup avr_boot
\def BOOTLOADER_SECTION

Used to declare a function or variable to be placed into a
new section called .bootloader. This section and its contents
can then be relocated to any address (such as the bootloader
NRWW area) at link-time. */

#define BOOTLOADER_SECTION __attribute__ ((section (".bootloader")))

#ifndef __DOXYGEN__
/* Create common bit definitions. */
#ifdef ASB
#define __COMMON_ASB ASB
#else
#define __COMMON_ASB RWWSB
#endif

#ifdef ASRE
#define __COMMON_ASRE ASRE
#else
#define __COMMON_ASRE RWWSRE
#endif

/* Define the bit positions of the Boot Lock Bits. */

#define BLB12 5
#define BLB11 4
#define BLB02 3
#define BLB01 2
#endif /* __DOXYGEN__ */

/** \ingroup avr_boot
\def boot_spm_interrupt_enable()
Enable the SPM interrupt. */

#define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE))

/** \ingroup avr_boot
\def boot_spm_interrupt_disable()
Disable the SPM interrupt. */

#define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE))

/** \ingroup avr_boot
\def boot_is_spm_interrupt()
Check if the SPM interrupt is enabled. */

#define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE))

/** \ingroup avr_boot
\def boot_rww_busy()
Check if the RWW section is busy. */

#define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB))

/** \ingroup avr_boot
\def boot_spm_busy()
Check if the SPM instruction is busy. */

#define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(__SPM_ENABLE))

/** \ingroup avr_boot
\def boot_spm_busy_wait()
Wait while the SPM instruction is busy. */

#define boot_spm_busy_wait() do{}while(boot_spm_busy())

#ifndef __DOXYGEN__
#define __BOOT_PAGE_ERASE (_BV(__SPM_ENABLE) | _BV(PGERS))
#define __BOOT_PAGE_WRITE (_BV(__SPM_ENABLE) | _BV(PGWRT))
#define __BOOT_PAGE_FILL _BV(__SPM_ENABLE)
#define __BOOT_RWW_ENABLE (_BV(__SPM_ENABLE) | _BV(__COMMON_ASRE))
#if defined(BLBSET)
#define __BOOT_LOCK_BITS_SET (_BV(__SPM_ENABLE) | _BV(BLBSET))
#elif defined(RFLB) /* Some devices have RFLB defined instead of BLBSET. */
#define __BOOT_LOCK_BITS_SET (_BV(__SPM_ENABLE) | _BV(RFLB))
#endif

#define __boot_page_fill_normal(address, data) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %3\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_PAGE_FILL)), \
"z" ((uint16_t)(address)), \
"r" ((uint16_t)(data)) \
: "r0" \
); \
}))

#define __boot_page_fill_alternate(address, data)\
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %3\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_PAGE_FILL)), \
"z" ((uint16_t)(address)), \
"r" ((uint16_t)(data)) \
: "r0" \
); \
}))

#define __boot_page_fill_extended(address, data) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %4\n\t" \
"movw r30, %A3\n\t" \
"sts %1, %C3\n\t" \
"sts %0, %2\n\t" \
"spm\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"i" (_SFR_MEM_ADDR(RAMPZ)), \
"r" ((uint8_t)(__BOOT_PAGE_FILL)), \
"r" ((uint32_t)(address)), \
"r" ((uint16_t)(data)) \
: "r0", "r30", "r31" \
); \
}))

#define __boot_page_erase_normal(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_PAGE_ERASE)), \
"z" ((uint16_t)(address)) \
); \
}))

#define __boot_page_erase_alternate(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_PAGE_ERASE)), \
"z" ((uint16_t)(address)) \
); \
}))

#define __boot_page_erase_extended(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r30, %A3\n\t" \
"sts %1, %C3\n\t" \
"sts %0, %2\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"i" (_SFR_MEM_ADDR(RAMPZ)), \
"r" ((uint8_t)(__BOOT_PAGE_ERASE)), \
"r" ((uint32_t)(address)) \
: "r30", "r31" \
); \
}))

#define __boot_page_write_normal(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_PAGE_WRITE)), \
"z" ((uint16_t)(address)) \
); \
}))

#define __boot_page_write_alternate(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_PAGE_WRITE)), \
"z" ((uint16_t)(address)) \
); \
}))

#define __boot_page_write_extended(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r30, %A3\n\t" \
"sts %1, %C3\n\t" \
"sts %0, %2\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"i" (_SFR_MEM_ADDR(RAMPZ)), \
"r" ((uint8_t)(__BOOT_PAGE_WRITE)), \
"r" ((uint32_t)(address)) \
: "r30", "r31" \
); \
}))

#define __boot_rww_enable() \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_RWW_ENABLE)) \
); \
}))

#define __boot_rww_enable_alternate() \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_RWW_ENABLE)) \
); \
}))

/* From the mega16/mega128 data sheets (maybe others):

Bits by SPM To set the Boot Loader Lock bits, write the desired data to
R0, write "X0001001" to SPMCR and execute SPM within four clock cycles
after writing SPMCR. The only accessible Lock bits are the Boot Lock bits
that may prevent the Application and Boot Loader section from any
software update by the MCU.

If bits 5..2 in R0 are cleared (zero), the corresponding Boot Lock bit
will be programmed if an SPM instruction is executed within four cycles
after BLBSET and SPMEN (or SELFPRGEN) are set in SPMCR. The Z-pointer is
don't care during this operation, but for future compatibility it is
recommended to load the Z-pointer with $0001 (same as used for reading the
Lock bits). For future compatibility It is also recommended to set bits 7,
6, 1, and 0 in R0 to 1 when writing the Lock bits. When programming the
Lock bits the entire Flash can be read during the operation. */

#define __boot_lock_bits_set(lock_bits) \
(__extension__({ \
uint8_t value = (uint8_t)(~(lock_bits)); \
__asm__ __volatile__ \
( \
"ldi r30, 1\n\t" \
"ldi r31, 0\n\t" \
"mov r0, %2\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_LOCK_BITS_SET)), \
"r" (value) \
: "r0", "r30", "r31" \
); \
}))

#define __boot_lock_bits_set_alternate(lock_bits) \
(__extension__({ \
uint8_t value = (uint8_t)(~(lock_bits)); \
__asm__ __volatile__ \
( \
"ldi r30, 1\n\t" \
"ldi r31, 0\n\t" \
"mov r0, %2\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_LOCK_BITS_SET)), \
"r" (value) \
: "r0", "r30", "r31" \
); \
}))
#endif /* __DOXYGEN__ */

/*
Reading lock and fuse bits:

Similarly to writing the lock bits above, set BLBSET and SPMEN (or
SELFPRGEN) bits in __SPMREG, and then (within four clock cycles) issue an
LPM instruction.

Z address: contents:
0x0000 low fuse bits
0x0001 lock bits
0x0002 extended fuse bits
0x0003 high fuse bits

Sounds confusing, doesn't it?

Unlike the macros in pgmspace.h, no need to care for non-enhanced
cores here as these old cores do not provide SPM support anyway.
*/

/** \ingroup avr_boot
\def GET_LOW_FUSE_BITS
address to read the low fuse bits, using boot_lock_fuse_bits_get
*/
#define GET_LOW_FUSE_BITS (0x0000)
/** \ingroup avr_boot
\def GET_LOCK_BITS
address to read the lock bits, using boot_lock_fuse_bits_get
*/
#define GET_LOCK_BITS (0x0001)
/** \ingroup avr_boot
\def GET_EXTENDED_FUSE_BITS
address to read the extended fuse bits, using boot_lock_fuse_bits_get
*/
#define GET_EXTENDED_FUSE_BITS (0x0002)
/** \ingroup avr_boot
\def GET_HIGH_FUSE_BITS
address to read the high fuse bits, using boot_lock_fuse_bits_get
*/
#define GET_HIGH_FUSE_BITS (0x0003)

/** \ingroup avr_boot
\def boot_lock_fuse_bits_get(address)

Read the lock or fuse bits at \c address.

Parameter \c address can be any of GET_LOW_FUSE_BITS,
GET_LOCK_BITS, GET_EXTENDED_FUSE_BITS, or GET_HIGH_FUSE_BITS.

\note The lock and fuse bits returned are the physical values,
i.e. a bit returned as 0 means the corresponding fuse or lock bit
is programmed.
*/
#define boot_lock_fuse_bits_get(address) \
(__extension__({ \
uint8_t __result; \
__asm__ __volatile__ \
( \
"sts %1, %2\n\t" \
"lpm %0, Z\n\t" \
: "=r" (__result) \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_LOCK_BITS_SET)), \
"z" ((uint16_t)(address)) \
); \
__result; \
}))

#ifndef __DOXYGEN__
#define __BOOT_SIGROW_READ (_BV(__SPM_ENABLE) | _BV(SIGRD))
#endif
/** \ingroup avr_boot
\def boot_signature_byte_get(address)

Read the Signature Row byte at \c address. For some MCU types,
this function can also retrieve the factory-stored oscillator
calibration bytes.

Parameter \c address can be 0-0x1f as documented by the datasheet.
\note The values are MCU type dependent.
*/

#define boot_signature_byte_get(addr) \
(__extension__({ \
uint8_t __result; \
__asm__ __volatile__ \
( \
"sts %1, %2\n\t" \
"lpm %0, Z" "\n\t" \
: "=r" (__result) \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)(__BOOT_SIGROW_READ)), \
"z" ((uint16_t)(addr)) \
); \
__result; \
}))

/** \ingroup avr_boot
\def boot_page_fill(address, data)

Fill the bootloader temporary page buffer for flash
address with data word.

\note The address is a byte address. The data is a word. The AVR
writes data to the buffer a word at a time, but addresses the buffer
per byte! So, increment your address by 2 between calls, and send 2
data bytes in a word format! The LSB of the data is written to the lower
address; the MSB of the data is written to the higher address.*/

/** \ingroup avr_boot
\def boot_page_erase(address)

Erase the flash page that contains address.

\note address is a byte address in flash, not a word address. */

/** \ingroup avr_boot
\def boot_page_write(address)

Write the bootloader temporary page buffer
to flash page that contains address.
\note address is a byte address in flash, not a word address. */

/** \ingroup avr_boot
\def boot_rww_enable()

Enable the Read-While-Write memory section. */

/** \ingroup avr_boot
\def boot_lock_bits_set(lock_bits)

Set the bootloader lock bits.

\param lock_bits A mask of which Boot Loader Lock Bits to set.

\note In this context, a 'set bit' will be written to a zero value.
Note also that only BLBxx bits can be programmed by this command.

For example, to disallow the SPM instruction from writing to the Boot
Loader memory section of flash, you would use this macro as such:

\code
boot_lock_bits_set (_BV (BLB11));
\endcode

\note Like any lock bits, the Boot Loader Lock Bits, once set,
cannot be cleared again except by a chip erase which will in turn
also erase the boot loader itself. */

/* Normal versions of the macros use 16-bit addresses.
Extended versions of the macros use 32-bit addresses.
Alternate versions of the macros use 16-bit addresses and require special
instruction sequences after LPM.

FLASHEND is defined in the ioXXXX.h file.
USHRT_MAX is defined in <limits.h>. */

#if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \
|| defined(__AVR_ATmega323__)

/* Alternate: ATmega161/163/323 and 16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_alternate(address, data)
#define boot_page_erase(address) __boot_page_erase_alternate(address)
#define boot_page_write(address) __boot_page_write_alternate(address)
#define boot_rww_enable() __boot_rww_enable_alternate()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits)

#elif (FLASHEND > USHRT_MAX)

/* Extended: >16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_extended(address, data)
#define boot_page_erase(address) __boot_page_erase_extended(address)
#define boot_page_write(address) __boot_page_write_extended(address)
#define boot_rww_enable() __boot_rww_enable()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits)

#else

/* Normal: 16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_normal(address, data)
#define boot_page_erase(address) __boot_page_erase_normal(address)
#define boot_page_write(address) __boot_page_write_normal(address)
#define boot_rww_enable() __boot_rww_enable()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits)

#endif

/** \ingroup avr_boot

Same as boot_page_fill() except it waits for eeprom and spm operations to
complete before filling the page. */

#define boot_page_fill_safe(address, data) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_page_fill(address, data); \
} while (0)

/** \ingroup avr_boot

Same as boot_page_erase() except it waits for eeprom and spm operations to
complete before erasing the page. */

#define boot_page_erase_safe(address) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_page_erase (address); \
} while (0)

/** \ingroup avr_boot

Same as boot_page_write() except it waits for eeprom and spm operations to
complete before writing the page. */

#define boot_page_write_safe(address) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_page_write (address); \
} while (0)

/** \ingroup avr_boot

Same as boot_rww_enable() except waits for eeprom and spm operations to
complete before enabling the RWW mameory. */

#define boot_rww_enable_safe() \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_rww_enable(); \
} while (0)

/** \ingroup avr_boot

Same as boot_lock_bits_set() except waits for eeprom and spm operations to
complete before setting the lock bits. */

#define boot_lock_bits_set_safe(lock_bits) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_lock_bits_set (lock_bits); \
} while (0)

#endif /* _AVR_BOOT_H_ */

+ 113
- 0
avr/avr/include/avr/builtins.h View File

@@ -0,0 +1,113 @@
/* Copyright (c) 2008 Anatoly Sokolov
Copyright (c) 2010 Joerg Wunsch
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.

* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.

* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */

/* $Id$ */

/*
avr/builtins.h - Intrinsic functions built into the compiler
*/
#ifndef _AVR_BUILTINS_H_
#define _AVR_BUILTINS_H_

#ifndef __HAS_DELAY_CYCLES
#define __HAS_DELAY_CYCLES 1
#endif

/** \file */
/** \defgroup avr_builtins <avr/builtins.h>: GCC builtins
\code #include <avr/builtins.h> \endcode

This header file declares AVR builtins.
All the functions documented here are built into the
compiler, and cause it to emit the corresponding assembly
code instructions.
*/

/**
\ingroup avr_builtins

Enables interrupts by setting the global interrupt mask. */
extern void __builtin_avr_sei(void);

/**
\ingroup avr_builtins

Disables all interrupts by clearing the global interrupt mask. */
extern void __builtin_avr_cli(void);

/**
\ingroup avr_builtins

Emits a \c SLEEP instruction. */

extern void __builtin_avr_sleep(void);

/**
\ingroup avr_builtins

Emits a WDR (watchdog reset) instruction. */
extern void __builtin_avr_wdr(void);

/**
\ingroup avr_builtins

Emits a SWAP (nibble swap) instruction on __b. */
extern unsigned char __builtin_avr_swap(unsigned char __b);

/**
\ingroup avr_builtins

Emits an FMUL (fractional multiply unsigned) instruction. */
extern unsigned int __builtin_avr_fmul(unsigned char __a, unsigned char __b);

/**
\ingroup avr_builtins

Emits an FMUL (fractional multiply signed) instruction. */
extern int __builtin_avr_fmuls(char __a, char __b);

/**
\ingroup avr_builtins

Emits an FMUL (fractional multiply signed with unsigned) instruction. */
extern int __builtin_avr_fmulsu(char __a, unsigned char __b);

#if __HAS_DELAY_CYCLES || defined(__DOXYGEN__)
/**
\ingroup avr_builtins

Emits a sequence of instructions causing the CPU to spend
\c __n cycles on it. */
extern void __builtin_avr_delay_cycles(unsigned long __n);
#endif

#endif /* _AVR_BUILTINS_H_ */

+ 335
- 0
avr/avr/include/avr/common.h View File

@@ -0,0 +1,335 @@
/* Copyright (c) 2007 Eric B. Weddington
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.

* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.

* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */

/* $Id$ */


#ifndef _AVR_COMMON_H
#define _AVR_COMMON_H

#include <avr/sfr_defs.h>

/*
This purpose of this header is to define registers that have not been
previously defined in the individual device IO header files, and to define
other symbols that are common across AVR device families.

This file is designed to be included in <avr/io.h> after the individual
device IO header files, and after <avr/sfr_defs.h>

*/

/*------------ Registers Not Previously Defined ------------*/

/*
These are registers that are not previously defined in the individual
IO header files, OR they are defined here because they are used in parts of
avr-libc even if a device is not selected but a general architecture has
been selected.
*/


/*
Stack pointer register.

AVR architecture 1 has no RAM, thus no stack pointer.

All other architectures do have a stack pointer. Some devices have only
less than 256 bytes of possible RAM locations (128 Bytes of SRAM
and no option for external RAM), thus SPH is officially "reserved"
for them.
*/
#if __AVR_ARCH__ >= 100
# ifndef SPL
# define SPL _SFR_MEM8(0x3D)
# endif
# ifndef SPH
# define SPH _SFR_MEM8(0x3E)
# endif
# ifndef SP
# define SP _SFR_MEM16(0x3D)
# endif
#elif __AVR_ARCH__ != 1
# ifndef SPL
# define SPL _SFR_IO8(0x3D)
# endif
# if XRAMEND < 0x100 && !defined(__COMPILING_AVR_LIBC__)
# ifndef SP
# define SP _SFR_IO8(0x3D)
# endif
# else
# ifndef SP
# define SP _SFR_IO16(0x3D)
# endif
# ifndef SPH
# define SPH _SFR_IO8(0x3E)
# endif
# endif /* XRAMEND < 0x100 && !defined(__COMPILING_AVR_LIBC__) */
#endif /* __AVR_ARCH__ != 1 */


/* Status Register */
#ifndef SREG
# if __AVR_ARCH__ >= 100
# define SREG _SFR_MEM8(0x3F)
# else
# define SREG _SFR_IO8(0x3F)
# endif
#endif


/* SREG bit definitions */
#ifndef SREG_C
# define SREG_C (0)
#endif
#ifndef SREG_Z
# define SREG_Z (1)
#endif
#ifndef SREG_N
# define SREG_N (2)
#endif
#ifndef SREG_V
# define SREG_V (3)
#endif
#ifndef SREG_S
# define SREG_S (4)
#endif
#ifndef SREG_H
# define SREG_H (5)
#endif
#ifndef SREG_T
# define SREG_T (6)
#endif
#ifndef SREG_I
# define SREG_I (7)
#endif


#if defined(__COMPILING_AVR_LIBC__)

/* AVR 6 Architecture */
# if __AVR_ARCH__ == 6
# ifndef EIND
# define EIND _SFR_IO8(0X3C)
# endif
/* XMEGA Architectures */
# elif __AVR_ARCH__ >= 100
# ifndef EIND
# define EIND _SFR_MEM8(0x3C)
# endif
# endif

/*
Only few devices come without EEPROM. In order to assemble the
EEPROM library components without defining a specific device, we
keep the EEPROM-related definitions here.
*/

/* EEPROM Control Register */
# ifndef EECR
# define EECR _SFR_IO8(0x1C)
# endif

/* EEPROM Data Register */
# ifndef EEDR
# define EEDR _SFR_IO8(0x1D)
# endif

/* EEPROM Address Register */
# ifndef EEAR
# define EEAR _SFR_IO16(0x1E)
# endif
# ifndef EEARL
# define EEARL _SFR_IO8(0x1E)
# endif
# ifndef EEARH
# define EEARH _SFR_IO8(0x1F)
# endif

/* EEPROM Control Register bits */
# ifndef EERE
# define EERE (0)
# endif
# ifndef EEWE
# define EEWE (1)
# endif
# ifndef EEMWE
# define EEMWE (2)
# endif
# ifndef EERIE
# define EERIE (3)
# endif


/* RAM Page Z Select Register */
#ifndef RAMPZ
# if defined(__AVR_HAVE_RAMPZ__) && __AVR_HAVE_RAMPZ__
# if __AVR_ARCH__ >= 100
# define RAMPZ _SFR_MEM8(0x3B)
# else
# define RAMPZ _SFR_IO8(0x3B)
# endif
# endif
#endif

#endif /* __COMPILING_AVR_LIBC__ */



/*------------ Common Symbols ------------*/

/*
Generic definitions for registers that are common across multiple AVR devices
and families.
*/

/* Pointer registers definitions */
#if __AVR_ARCH__ != 1 /* avr1 does not have X and Y pointers */
# define XL r26
# define XH r27
# define YL r28
# define YH r29
#endif /* #if __AVR_ARCH__ != 1 */
#define ZL r30
#define ZH r31


/* Status Register */
#if defined(SREG)
# define AVR_STATUS_REG SREG
# if __AVR_ARCH__ >= 100
# define AVR_STATUS_ADDR _SFR_MEM_ADDR(SREG)
# else
# define AVR_STATUS_ADDR _SFR_IO_ADDR(SREG)
# endif
#endif

/* Stack Pointer (combined) Register */
#if defined(SP)
# define AVR_STACK_POINTER_REG SP
# if __AVR_ARCH__ >= 100
# define AVR_STACK_POINTER_ADDR _SFR_MEM_ADDR(SP)
# else
# define AVR_STACK_POINTER_ADDR _SFR_IO_ADDR(SP)
# endif
#endif

/* Stack Pointer High Register */
#if defined(SPH)
# define _HAVE_AVR_STACK_POINTER_HI 1
# define AVR_STACK_POINTER_HI_REG SPH
# if __AVR_ARCH__ >= 100
# define AVR_STACK_POINTER_HI_ADDR _SFR_MEM_ADDR(SPH)
# else
# define AVR_STACK_POINTER_HI_ADDR _SFR_IO_ADDR(SPH)
# endif
#endif

/* Stack Pointer Low Register */
#if defined(SPL)
# define AVR_STACK_POINTER_LO_REG SPL
# if __AVR_ARCH__ >= 100
# define AVR_STACK_POINTER_LO_ADDR _SFR_MEM_ADDR(SPL)
# else
# define AVR_STACK_POINTER_LO_ADDR _SFR_IO_ADDR(SPL)
# endif
#endif

/* RAMPD Register */
#if defined(RAMPD)
# define AVR_RAMPD_REG RAMPD
# if __AVR_ARCH__ >= 100
# define AVR_RAMPD_ADDR _SFR_MEM_ADDR(RAMPD)
# else
# define AVR_RAMPD_ADDR _SFR_IO_ADDR(RAMPD)
# endif
#endif

/* RAMPX Register */
#if defined(RAMPX)
# define AVR_RAMPX_REG RAMPX
# if __AVR_ARCH__ >= 100
# define AVR_RAMPX_ADDR _SFR_MEM_ADDR(RAMPX)
# else
# define AVR_RAMPX_ADDR _SFR_IO_ADDR(RAMPX)
# endif
#endif

/* RAMPY Register */
#if defined(RAMPY)
# define AVR_RAMPY_REG RAMPY
# if __AVR_ARCH__ >= 100
# define AVR_RAMPY_ADDR _SFR_MEM_ADDR(RAMPY)
# else
# define AVR_RAMPY_ADDR _SFR_IO_ADDR(RAMPY)
# endif
#endif

/* RAMPZ Register */
#if defined(RAMPZ)
# define AVR_RAMPZ_REG RAMPZ
# if __AVR_ARCH__ >= 100
# define AVR_RAMPZ_ADDR _SFR_MEM_ADDR(RAMPZ)
# else
# define AVR_RAMPZ_ADDR _SFR_IO_ADDR(RAMPZ)
# endif
#endif

/* Extended Indirect Register */
#if defined(EIND)
# define AVR_EXTENDED_INDIRECT_REG EIND
# if __AVR_ARCH__ >= 100
# define AVR_EXTENDED_INDIRECT_ADDR _SFR_MEM_ADDR(EIND)
# else
# define AVR_EXTENDED_INDIRECT_ADDR _SFR_IO_ADDR(EIND)
# endif
#endif

/*------------ Workaround to old compilers (4.1.2 and earlier) ------------*/

#ifndef __AVR_HAVE_MOVW__
# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__
# define __AVR_HAVE_MOVW__ 1
# endif
#endif

#ifndef __AVR_HAVE_LPMX__
# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__
# define __AVR_HAVE_LPMX__ 1
# endif
#endif

#ifndef __AVR_HAVE_MUL__
# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__
# define __AVR_HAVE_MUL__ 1
# endif
#endif

#endif /* _AVR_COMMON_H */

+ 93
- 0
avr/avr/include/avr/cpufunc.h View File

@@ -0,0 +1,93 @@
/* Copyright (c) 2010, Joerg Wunsch
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.

* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.

* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */

/* $Id$ */

/* avr/cpufunc.h - Special CPU functions */

#ifndef _AVR_CPUFUNC_H_
#define _AVR_CPUFUNC_H_ 1

#include <stdint.h>

/** \file */
/** \defgroup avr_cpufunc <avr/cpufunc.h>: Special AVR CPU functions
\code #include <avr/cpufunc.h> \endcode

This header file contains macros that access special functions of
the AVR CPU which do not fit into any of the other header files.

*/

#if defined(__DOXYGEN__)
/**
\ingroup avr_cpufunc
\def _NOP

Execute a <i>no operation</i> (NOP) CPU instruction. This
should not be used to implement delays, better use the functions
from <util/delay_basic.h> or <util/delay.h> for this. For
debugging purposes, a NOP can be useful to have an instruction that
is guaranteed to be not optimized away by the compiler, so it can
always become a breakpoint in the debugger.
*/
#define _NOP()
#else /* real code */
#define _NOP() __asm__ __volatile__("nop")
#endif /* __DOXYGEN__ */

#if defined(__DOXYGEN__)
/**
\ingroup avr_cpufunc
\def _MemoryBarrier

Implement a read/write <i>memory barrier</i>. A memory
barrier instructs the compiler to not cache any memory data in
registers beyond the barrier. This can sometimes be more effective
than blocking certain optimizations by declaring some object with a
\c volatile qualifier.

See \ref optim_code_reorder for things to be taken into account
with respect to compiler optimizations.
*/
#define _MemoryBarrier()
#else /* real code */
#define _MemoryBarrier() __asm__ __volatile__("":::"memory")
#endif /* __DOXYGEN__ */

/**
\ingroup avr_cpufunc

Write \a __value to Configuration Change Protected (CCP) IO register
at \a __ioaddr.
*/
void ccp_write_io (uint8_t *__ioaddr, uint8_t __value);

#endif /* _AVR_CPUFUNC_H_ */

+ 39
- 0
avr/avr/include/avr/crc16.h View File

@@ -0,0 +1,39 @@
/* Copyright (c) 2005 Joerg Wunsch
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.

* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.

* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */

/* $Id$ */

#ifndef _AVR_CRC16_H_
#define _AVR_CRC16_H_

#warning "This file has been moved to <util/crc16.h>."
#include <util/crc16.h>

#endif /* _AVR_CRC16_H_ */

+ 39
- 0
avr/avr/include/avr/delay.h View File

@@ -0,0 +1,39 @@
/* Copyright (c) 2005 Joerg Wunsch
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.

* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.

* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */

/* $Id$ */

#ifndef _AVR_DELAY_H_
#define _AVR_DELAY_H_

#warning "This file has been moved to <util/delay.h>."
#include <util/delay.h>

#endif /* _AVR_DELAY_H_ */

+ 248
- 0
avr/avr/include/avr/eeprom.h View File

@@ -0,0 +1,248 @@
/* Copyright (c) 2002, 2003, 2004, 2007 Marek Michalkiewicz
Copyright (c) 2005, 2006 Bjoern Haase
Copyright (c) 2008 Atmel Corporation
Copyright (c) 2008 Wouter van Gulik
Copyright (c) 2009 Dmitry Xmelkov
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */

/* $Id$ */

#ifndef _AVR_EEPROM_H_
#define _AVR_EEPROM_H_ 1

#include <avr/io.h>

#if !E2END && !defined(__DOXYGEN__) && !defined(__COMPILING_AVR_LIBC__)
# warning "Device does not have EEPROM available."
#else

#if defined (EEAR) && !defined (EEARL) && !defined (EEARH)
#define EEARL EEAR
#endif

#ifndef __ASSEMBLER__

#include <stddef.h> /* size_t */
#include <stdint.h>

/** \defgroup avr_eeprom <avr/eeprom.h>: EEPROM handling
\code #include <avr/eeprom.h> \endcode

This header file declares the interface to some simple library
routines suitable for handling the data EEPROM contained in the
AVR microcontrollers. The implementation uses a simple polled
mode interface. Applications that require interrupt-controlled
EEPROM access to ensure that no time will be wasted in spinloops
will have to deploy their own implementation.

\par Notes:

- In addition to the write functions there is a set of update ones.
This functions read each byte first and skip the burning if the
old value is the same with new. The scaning direction is from
high address to low, to obtain quick return in common cases.

- All of the read/write functions first make sure the EEPROM is
ready to be accessed. Since this may cause long delays if a
write operation is still pending, time-critical applications
should first poll the EEPROM e. g. using eeprom_is_ready() before
attempting any actual I/O. But this functions are not wait until
SELFPRGEN in SPMCSR becomes zero. Do this manually, if your
softwate contains the Flash burning.

- As these functions modify IO registers, they are known to be
non-reentrant. If any of these functions are used from both,
standard and interrupt context, the applications must ensure
proper protection (e.g. by disabling interrupts before accessing
them).

- All write functions force erase_and_write programming mode.
- For Xmega the EEPROM start address is 0, like other architectures.
The reading functions add the 0x2000 value to use EEPROM mapping into
data space.
*/

#ifdef __cplusplus
extern "C" {
#endif

#ifndef __ATTR_PURE__
# ifdef __DOXYGEN__
# define __ATTR_PURE__
# else
# define __ATTR_PURE__ __attribute__((__pure__))
# endif
#endif

/** \def EEMEM
\ingroup avr_eeprom
Attribute expression causing a variable to be allocated within the
.eeprom section. */
#define EEMEM __attribute__((section(".eeprom")))

/** \def eeprom_is_ready
\ingroup avr_eeprom
\returns 1 if EEPROM is ready for a new read/write operation, 0 if not.
*/
#if defined (__DOXYGEN__)
# define eeprom_is_ready()
#elif defined (NVM_STATUS)
# define eeprom_is_ready() bit_is_clear (NVM_STATUS, NVM_NVMBUSY_bp)
#elif defined (NVMCTRL_STATUS)
# define eeprom_is_ready() bit_is_clear (NVMCTRL_STATUS, NVMCTRL_EEBUSY_bp)
#elif defined (DEECR)
# define eeprom_is_ready() bit_is_clear (DEECR, BSY)
#elif defined (EEPE)
# define eeprom_is_ready() bit_is_clear (EECR, EEPE)
#else
# define eeprom_is_ready() bit_is_clear (EECR, EEWE)
#endif


/** \def eeprom_busy_wait
\ingroup avr_eeprom
Loops until the eeprom is no longer busy.
\returns Nothing.
*/
#define eeprom_busy_wait() do {} while (!eeprom_is_ready())


/** \ingroup avr_eeprom
Read one byte from EEPROM address \a __p.
*/
uint8_t eeprom_read_byte (const uint8_t *__p) __ATTR_PURE__;

/** \ingroup avr_eeprom
Read one 16-bit word (little endian) from EEPROM address \a __p.
*/
uint16_t eeprom_read_word (const uint16_t *__p) __ATTR_PURE__;

/** \ingroup avr_eeprom
Read one 32-bit double word (little endian) from EEPROM address \a __p.
*/
uint32_t eeprom_read_dword (const uint32_t *__p) __ATTR_PURE__;

/** \ingroup avr_eeprom
Read one float value (little endian) from EEPROM address \a __p.
*/
float eeprom_read_float (const float *__p) __ATTR_PURE__;

/** \ingroup avr_eeprom
Read a block of \a __n bytes from EEPROM address \a __src to SRAM
\a __dst.
*/
void eeprom_read_block (void *__dst, const void *__src, size_t __n);


/** \ingroup avr_eeprom
Write a byte \a __value to EEPROM address \a __p.
*/
void eeprom_write_byte (uint8_t *__p, uint8_t __value);

/** \ingroup avr_eeprom
Write a word \a __value to EEPROM address \a __p.
*/
void eeprom_write_word (uint16_t *__p, uint16_t __value);

/** \ingroup avr_eeprom
Write a 32-bit double word \a __value to EEPROM address \a __p.
*/
void eeprom_write_dword (uint32_t *__p, uint32_t __value);

/** \ingroup avr_eeprom
Write a float \a __value to EEPROM address \a __p.
*/
void eeprom_write_float (float *__p, float __value);

/** \ingroup avr_eeprom
Write a block of \a __n bytes to EEPROM address \a __dst from \a __src.
\note The argument order is mismatch with common functions like strcpy().
*/
void eeprom_write_block (const void *__src, void *__dst, size_t __n);


/** \ingroup avr_eeprom
Update a byte \a __value to EEPROM address \a __p.
*/
void eeprom_update_byte (uint8_t *__p, uint8_t __value);

/** \ingroup avr_eeprom
Update a word \a __value to EEPROM address \a __p.
*/
void eeprom_update_word (uint16_t *__p, uint16_t __value);

/** \ingroup avr_eeprom
Update a 32-bit double word \a __value to EEPROM address \a __p.
*/
void eeprom_update_dword (uint32_t *__p, uint32_t __value);

/** \ingroup avr_eeprom
Update a float \a __value to EEPROM address \a __p.
*/
void eeprom_update_float (float *__p, float __value);

/** \ingroup avr_eeprom
Update a block of \a __n bytes to EEPROM address \a __dst from \a __src.
\note The argument order is mismatch with common functions like strcpy().
*/
void eeprom_update_block (const void *__src, void *__dst, size_t __n);


/** \name IAR C compatibility defines */
/*@{*/

/** \def _EEPUT
\ingroup avr_eeprom
Write a byte to EEPROM. Compatibility define for IAR C. */
#define _EEPUT(addr, val) eeprom_write_byte ((uint8_t *)(addr), (uint8_t)(val))

/** \def __EEPUT
\ingroup avr_eeprom
Write a byte to EEPROM. Compatibility define for IAR C. */
#define __EEPUT(addr, val) eeprom_write_byte ((uint8_t *)(addr), (uint8_t)(val))

/** \def _EEGET
\ingroup avr_eeprom
Read a byte from EEPROM. Compatibility define for IAR C. */
#define _EEGET(var, addr) (var) = eeprom_read_byte ((const uint8_t *)(addr))

/** \def __EEGET
\ingroup avr_eeprom
Read a byte from EEPROM. Compatibility define for IAR C. */
#define __EEGET(var, addr) (var) = eeprom_read_byte ((const uint8_t *)(addr))

/*@}*/

#ifdef __cplusplus
}
#endif

#endif /* !__ASSEMBLER__ */
#endif /* E2END || defined(__DOXYGEN__) || defined(__COMPILING_AVR_LIBC__) */
#endif /* !_AVR_EEPROM_H_ */

+ 274
- 0
avr/avr/include/avr/fuse.h View File

@@ -0,0 +1,274 @@
/* Copyright (c) 2007, Atmel Corporation
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.

* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.

* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */

/* $Id$ */

/* avr/fuse.h - Fuse API */

#ifndef _AVR_FUSE_H_
#define _AVR_FUSE_H_ 1

/* This file must be explicitly included by <avr/io.h>. */
#if !defined(_AVR_IO_H_)
#error "You must #include <avr/io.h> and not <avr/fuse.h> by itself."
#endif


/** \file */
/** \defgroup avr_fuse <avr/fuse.h>: Fuse Support

\par Introduction

The Fuse API allows a user to specify the fuse settings for the specific
AVR device they are compiling for. These fuse settings will be placed
in a special section in the ELF output file, after linking.

Programming tools can take advantage of the fuse information embedded in
the ELF file, by extracting this information and determining if the fuses
need to be programmed before programming the Flash and EEPROM memories.
This also allows a single ELF file to contain all the
information needed to program an AVR.

To use the Fuse API, include the <avr/io.h> header file, which in turn
automatically includes the individual I/O header file and the <avr/fuse.h>
file. These other two files provides everything necessary to set the AVR
fuses.
\par Fuse API
Each I/O header file must define the FUSE_MEMORY_SIZE macro which is
defined to the number of fuse bytes that exist in the AVR device.
A new type, __fuse_t, is defined as a structure. The number of fields in
this structure are determined by the number of fuse bytes in the
FUSE_MEMORY_SIZE macro.
If FUSE_MEMORY_SIZE == 1, there is only a single field: byte, of type
unsigned char.
If FUSE_MEMORY_SIZE == 2, there are two fields: low, and high, of type
unsigned char.
If FUSE_MEMORY_SIZE == 3, there are three fields: low, high, and extended,
of type unsigned char.
If FUSE_MEMORY_SIZE > 3, there is a single field: byte, which is an array
of unsigned char with the size of the array being FUSE_MEMORY_SIZE.
A convenience macro, FUSEMEM, is defined as a GCC attribute for a
custom-named section of ".fuse".
A convenience macro, FUSES, is defined that declares a variable, __fuse, of
type __fuse_t with the attribute defined by FUSEMEM. This variable
allows the end user to easily set the fuse data.

\note If a device-specific I/O header file has previously defined FUSEMEM,
then FUSEMEM is not redefined. If a device-specific I/O header file has
previously defined FUSES, then FUSES is not redefined.

Each AVR device I/O header file has a set of defined macros which specify the
actual fuse bits available on that device. The AVR fuses have inverted
values, logical 1 for an unprogrammed (disabled) bit and logical 0 for a
programmed (enabled) bit. The defined macros for each individual fuse
bit represent this in their definition by a bit-wise inversion of a mask.
For example, the FUSE_EESAVE fuse in the ATmega128 is defined as:
\code
#define FUSE_EESAVE ~_BV(3)
\endcode
\note The _BV macro creates a bit mask from a bit number. It is then
inverted to represent logical values for a fuse memory byte.
To combine the fuse bits macros together to represent a whole fuse byte,
use the bitwise AND operator, like so:
\code
(FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_EESAVE & FUSE_SPIEN & FUSE_JTAGEN)
\endcode
Each device I/O header file also defines macros that provide default values
for each fuse byte that is available. LFUSE_DEFAULT is defined for a Low
Fuse byte. HFUSE_DEFAULT is defined for a High Fuse byte. EFUSE_DEFAULT
is defined for an Extended Fuse byte.
If FUSE_MEMORY_SIZE > 3, then the I/O header file defines macros that
provide default values for each fuse byte like so:
FUSE0_DEFAULT
FUSE1_DEFAULT
FUSE2_DEFAULT
FUSE3_DEFAULT
FUSE4_DEFAULT
....
\par API Usage Example
Putting all of this together is easy. Using C99's designated initializers:
\code
#include <avr/io.h>

FUSES =
{
.low = LFUSE_DEFAULT,
.high = (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_EESAVE & FUSE_SPIEN & FUSE_JTAGEN),
.extended = EFUSE_DEFAULT,
};

int main(void)
{
return 0;
}
\endcode
Or, using the variable directly instead of the FUSES macro,
\code
#include <avr/io.h>

__fuse_t __fuse __attribute__((section (".fuse"))) =
{
.low = LFUSE_DEFAULT,
.high = (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_EESAVE & FUSE_SPIEN & FUSE_JTAGEN),
.extended = EFUSE_DEFAULT,
};

int main(void)
{
return 0;
}
\endcode
If you are compiling in C++, you cannot use the designated intializers so
you must do:

\code
#include <avr/io.h>

FUSES =
{
LFUSE_DEFAULT, // .low
(FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_EESAVE & FUSE_SPIEN & FUSE_JTAGEN), // .high
EFUSE_DEFAULT, // .extended
};

int main(void)
{
return 0;
}
\endcode
However there are a number of caveats that you need to be aware of to
use this API properly.
Be sure to include <avr/io.h> to get all of the definitions for the API.
The FUSES macro defines a global variable to store the fuse data. This
variable is assigned to its own linker section. Assign the desired fuse
values immediately in the variable initialization.
The .fuse section in the ELF file will get its values from the initial
variable assignment ONLY. This means that you can NOT assign values to
this variable in functions and the new values will not be put into the
ELF .fuse section.
The global variable is declared in the FUSES macro has two leading
underscores, which means that it is reserved for the "implementation",
meaning the library, so it will not conflict with a user-named variable.
You must initialize ALL fields in the __fuse_t structure. This is because
the fuse bits in all bytes default to a logical 1, meaning unprogrammed.
Normal uninitialized data defaults to all locgial zeros. So it is vital that
all fuse bytes are initialized, even with default data. If they are not,
then the fuse bits may not programmed to the desired settings.
Be sure to have the -mmcu=<em>device</em> flag in your compile command line and
your linker command line to have the correct device selected and to have
the correct I/O header file included when you include <avr/io.h>.

You can print out the contents of the .fuse section in the ELF file by
using this command line:
\code
avr-objdump -s -j .fuse <ELF file>
\endcode
The section contents shows the address on the left, then the data going from
lower address to a higher address, left to right.

*/

#if !(defined(__ASSEMBLER__) || defined(__DOXYGEN__))

#ifndef FUSEMEM
#define FUSEMEM __attribute__((__used__, __section__ (".fuse")))
#endif

#if FUSE_MEMORY_SIZE > 3

typedef struct
{
unsigned char byte[FUSE_MEMORY_SIZE];
} __fuse_t;


#elif FUSE_MEMORY_SIZE == 3

typedef struct
{
unsigned char low;
unsigned char high;
unsigned char extended;
} __fuse_t;

#elif FUSE_MEMORY_SIZE == 2

typedef struct
{
unsigned char low;
unsigned char high;
} __fuse_t;

#elif FUSE_MEMORY_SIZE == 1

typedef struct
{
unsigned char byte;
} __fuse_t;

#endif

#if !defined(FUSES)
#if defined(__AVR_XMEGA__)
#define FUSES NVM_FUSES_t __fuse FUSEMEM
#else
#define FUSES __fuse_t __fuse FUSEMEM
#endif
#endif


#endif /* !(__ASSEMBLER__ || __DOXYGEN__) */

#endif /* _AVR_FUSE_H_ */

+ 344
- 0
avr/avr/include/avr/interrupt.h View File

@@ -0,0 +1,344 @@
/* Copyright (c) 2002,2005,2007 Marek Michalkiewicz
Copyright (c) 2007, Dean Camera

All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.

* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.

* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE