make
load
r
n
p ret
q
make
load
r
n
make
load
r
n
n
n
n
n
p ret
make clean
q
b main.c:138
r
s
n
s
s
b p_serial_mgr.c:45
del 0
del
b p_serial_mgr.c:45
r
s
s
s
p sstate
make
load
r
s
s
s
p sstate
b p_serial_mgr.c:45 if (sstate == SS_START)
del 3
r
b p_serial_mgr.c:30
r
c
p rxc
make
load
r
q
b p_serial_mgr.c:47 if sstate == SS_START
r
b p_serial_mgr.c:30
r
p rxb[0]
c
p rxb[0]
p huart
p *huart
make
load
r
del
b p_serial_mgr.c:30
r
p rxb
p/x *rxb@10
p/x *rxb@10
c
q
b p_serial_mgr.c:35
r
q
b p_serial_mgr.c:35
r
s
q
b p_serial_mgr.c:35
r
p/x *q
q
b p_serial_mgr.c:35
r
p/x *sbuffer[active_buffer]@24
r
b p_serial_mgr.c:35
r
q
b p_serial_mgr.c:35
r
p/x *sbuffer[active_buffer]@24
c
q
b p_serial_mgr.c:35
r
qq
q
b p_serial_mgr.c:35
r
p sstate
c
b p_serial_mgr.c:35
c
make
load
r
p sbuffer[active_buffer][0]
c
p sbuffer[active_buffer][0]
q
q
q
b p_serial_mgr.c:35
r
p sbuffer[active_buffer][0]
p/x sbuffer[active_buffer][0]
c
p/x sbuffer[active_buffer][0]
c
s
s
p sstate
c
r
p/x sbuffer[active_buffer][0]
s
s
s
s
s
n
n
n
n
n
n
n
n
n
finish
s
s
s
c
r
del
b p_serial_mgr.c:52 if sstate == SS_START
r
b p_serial_mgr.c:53 if sstate == SS_START
r
n
n
finish
r
n
n
advance
advance 59
n
n
n
p active_buffer
n
c
q
b p_serial_mgr.c:35
r
p/x sbuffer[active_buffer][0]
c
p/x sbuffer[active_buffer][0]
s
s
s
s
s
s
n
advance 61
s
n
r
p/x sbuffer[active_buffer][0]
p/x sbuffer[active_buffer]
s
q
r
s
s
s
s
s
s
s
p sstate
q
r
s
s
s
s
s
s
s
p p_serial_mgr.c:41
b p_serial_mgr.c:41
r
p/x sbuffer[active_buffer][0]
c
c
del
b p_serial_mgr.c:73
r
n
q
b p_serial_mgr.c:73
r
n
n
c
n
c
q
b p_serial_mgr.c:82
r
s
make
load
r
s
b p_serial_mgr.c:83
del 1
r
p ret
c
p ret
c
make
load
del
b p_serial_mgr.c:83 if ret != HAL_OK
r
p _serial_huart_inst->RxState
p/x _serial_huart_inst->RxState
p/b _serial_huart_inst->RxState
p/o _serial_huart_inst->RxState
p/x _serial_huart_inst->RxState
q
b UART1RxCpltCallback
b UART1_RxCpltCallback 
r
n
q